| Line 10... |
Line 10... |
//// ////
|
//// ////
|
//// Downloaded from: http://www.opencores.org/cores/ac97_ctrl/ ////
|
//// Downloaded from: http://www.opencores.org/cores/ac97_ctrl/ ////
|
//// ////
|
//// ////
|
/////////////////////////////////////////////////////////////////////
|
/////////////////////////////////////////////////////////////////////
|
//// ////
|
//// ////
|
//// Copyright (C) 2001 Rudolf Usselmann ////
|
//// Copyright (C) 2000-2002 Rudolf Usselmann ////
|
|
//// www.asics.ws ////
|
//// rudi@asics.ws ////
|
//// rudi@asics.ws ////
|
//// ////
|
//// ////
|
//// This source file may be used and distributed without ////
|
//// This source file may be used and distributed without ////
|
//// restriction provided that this copyright statement is not ////
|
//// restriction provided that this copyright statement is not ////
|
//// removed from the file and that any derivative work contains ////
|
//// removed from the file and that any derivative work contains ////
|
| Line 36... |
Line 37... |
//// ////
|
//// ////
|
/////////////////////////////////////////////////////////////////////
|
/////////////////////////////////////////////////////////////////////
|
|
|
// CVS Log
|
// CVS Log
|
//
|
//
|
// $Id: ac97_soc.v,v 1.2 2002-03-05 04:44:05 rudi Exp $
|
// $Id: ac97_soc.v,v 1.3 2002-09-19 06:30:56 rudi Exp $
|
//
|
//
|
// $Date: 2002-03-05 04:44:05 $
|
// $Date: 2002-09-19 06:30:56 $
|
// $Revision: 1.2 $
|
// $Revision: 1.3 $
|
// $Author: rudi $
|
// $Author: rudi $
|
// $Locker: $
|
// $Locker: $
|
// $State: Exp $
|
// $State: Exp $
|
//
|
//
|
// Change History:
|
// Change History:
|
// $Log: not supported by cvs2svn $
|
// $Log: not supported by cvs2svn $
|
|
// Revision 1.2 2002/03/05 04:44:05 rudi
|
|
//
|
|
// - Fixed the order of the thrash hold bits to match the spec.
|
|
// - Many minor synthesis cleanup items ...
|
|
//
|
// Revision 1.1 2001/08/03 06:54:50 rudi
|
// Revision 1.1 2001/08/03 06:54:50 rudi
|
//
|
//
|
//
|
//
|
// - Changed to new directory structure
|
// - Changed to new directory structure
|
//
|
//
|
| Line 88... |
Line 94... |
reg [5:0] out_le;
|
reg [5:0] out_le;
|
reg ld;
|
reg ld;
|
reg valid;
|
reg valid;
|
reg [2:0] in_valid;
|
reg [2:0] in_valid;
|
reg bit_clk_r;
|
reg bit_clk_r;
|
|
reg bit_clk_r1;
|
reg bit_clk_e;
|
reg bit_clk_e;
|
reg suspended;
|
reg suspended;
|
wire to;
|
wire to;
|
reg [5:0] to_cnt;
|
reg [5:0] to_cnt;
|
reg [3:0] res_cnt;
|
reg [3:0] res_cnt;
|
| Line 153... |
Line 160... |
|
|
always @(posedge wclk)
|
always @(posedge wclk)
|
bit_clk_r <= #1 clk;
|
bit_clk_r <= #1 clk;
|
|
|
always @(posedge wclk)
|
always @(posedge wclk)
|
bit_clk_e <= #1 (clk & !bit_clk_r) | (!clk & bit_clk_r);
|
bit_clk_r1 <= #1 bit_clk_r;
|
|
|
|
always @(posedge wclk)
|
|
bit_clk_e <= #1 (bit_clk_r & !bit_clk_r1) | (!bit_clk_r & bit_clk_r1);
|
|
|
always @(posedge wclk)
|
always @(posedge wclk)
|
suspended <= #1 to;
|
suspended <= #1 to;
|
|
|
assign to = (to_cnt == `AC97_SUSP_DET);
|
assign to = (to_cnt == `AC97_SUSP_DET);
|
