| Line 28... |
Line 28... |
#include <pthread.h> // for mutexes
|
#include <pthread.h> // for mutexes
|
#include <arpa/inet.h> // for ntohl()
|
#include <arpa/inet.h> // for ntohl()
|
|
|
#include "adv_dbg_commands.h"
|
#include "adv_dbg_commands.h"
|
#include "legacy_dbg_commands.h"
|
#include "legacy_dbg_commands.h"
|
|
#include "cable_common.h"
|
#include "errcodes.h"
|
#include "errcodes.h"
|
|
|
#define debug(...) //fprintf(stderr, __VA_ARGS__ )
|
#define debug(...) //fprintf(stderr, __VA_ARGS__ )
|
|
|
#define DBG_HW_ADVANCED 1
|
#define DBG_HW_ADVANCED 1
|
| Line 53... |
Line 54... |
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
{
|
{
|
if ((err = adbg_select_module(DC_WISHBONE)))
|
if ((err = adbg_select_module(DC_WISHBONE)))
|
{
|
{
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
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}
|
err = adbg_wb_burst_read(4, 1, adr, (void *)data); // All WB reads / writes are bursts
|
err = adbg_wb_burst_read(4, 1, adr, (void *)data); // All WB reads / writes are bursts
|
}
|
}
|
| Line 65... |
Line 67... |
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, 4)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, 4)))
|
err = legacy_dbg_go((unsigned char*)data, 4, 1);
|
err = legacy_dbg_go((unsigned char*)data, 4, 1);
|
*data = ntohl(*data);
|
*data = ntohl(*data);
|
}
|
}
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
|
|
/* write a word to wishbone */
|
/* write a word to wishbone */
|
| Line 79... |
Line 81... |
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
{
|
{
|
if ((err = adbg_select_module(DC_WISHBONE)))
|
if ((err = adbg_select_module(DC_WISHBONE)))
|
{
|
{
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
err = adbg_wb_burst_write((void *)&data, 4, 1, adr);
|
err = adbg_wb_burst_write((void *)&data, 4, 1, adr);
|
}
|
}
|
| Line 91... |
Line 94... |
data = ntohl(data);
|
data = ntohl(data);
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, 4)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, 4)))
|
err = legacy_dbg_go((unsigned char*)&data, 4, 0);
|
err = legacy_dbg_go((unsigned char*)&data, 4, 0);
|
}
|
}
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
|
|
// write a word to wishbone
|
// write a word to wishbone
|
| Line 105... |
Line 109... |
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
{
|
{
|
if ((err = adbg_select_module(DC_WISHBONE)))
|
if ((err = adbg_select_module(DC_WISHBONE)))
|
{
|
{
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
err = adbg_wb_burst_write((void *)&data, 2, 1, adr);
|
err = adbg_wb_burst_write((void *)&data, 2, 1, adr);
|
}
|
}
|
| Line 117... |
Line 122... |
data = ntohs(data);
|
data = ntohs(data);
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x1, adr, 2)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x1, adr, 2)))
|
err = legacy_dbg_go((unsigned char*)&data, 2, 0);
|
err = legacy_dbg_go((unsigned char*)&data, 2, 0);
|
}
|
}
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
|
|
// write a word to wishbone
|
// write a word to wishbone
|
| Line 132... |
Line 137... |
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
{
|
{
|
if ((err = adbg_select_module(DC_WISHBONE)))
|
if ((err = adbg_select_module(DC_WISHBONE)))
|
{
|
{
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
err = adbg_wb_burst_write((void *)&data, 1, 1, adr);
|
err = adbg_wb_burst_write((void *)&data, 1, 1, adr);
|
}
|
}
|
| Line 143... |
Line 149... |
{
|
{
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x0, adr, 1)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x0, adr, 1)))
|
err = legacy_dbg_go((unsigned char*)&data, 1, 0);
|
err = legacy_dbg_go((unsigned char*)&data, 1, 0);
|
}
|
}
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
|
|
|
|
| Line 160... |
Line 166... |
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
{
|
{
|
if ((err = adbg_select_module(DC_WISHBONE)))
|
if ((err = adbg_select_module(DC_WISHBONE)))
|
{
|
{
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
err = adbg_wb_burst_read(4, len, adr, (void *)data); // 'len' is words.
|
err = adbg_wb_burst_read(4, len, adr, (void *)data); // 'len' is words.
|
}
|
}
|
| Line 174... |
Line 181... |
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, bytelen)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, bytelen)))
|
if (APP_ERR_NONE == (err = legacy_dbg_go((unsigned char*)data, bytelen, 1))) // 'len' is words, call wants bytes
|
if (APP_ERR_NONE == (err = legacy_dbg_go((unsigned char*)data, bytelen, 1))) // 'len' is words, call wants bytes
|
for (i = 0; i < len; i ++) data[i] = ntohl(data[i]);
|
for (i = 0; i < len; i ++) data[i] = ntohl(data[i]);
|
}
|
}
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
|
|
|
|
| Line 192... |
Line 199... |
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
{
|
{
|
if ((err = adbg_select_module(DC_WISHBONE)))
|
if ((err = adbg_select_module(DC_WISHBONE)))
|
{
|
{
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
err = adbg_wb_burst_read(2, len, adr, (void *)data); // 'len' is 16-bit halfwords
|
err = adbg_wb_burst_read(2, len, adr, (void *)data); // 'len' is 16-bit halfwords
|
}
|
}
|
| Line 206... |
Line 214... |
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x5, adr, bytelen)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x5, adr, bytelen)))
|
if (APP_ERR_NONE == (err = legacy_dbg_go((unsigned char*)data, bytelen, 1))) // 'len' is halfwords, call wants bytes
|
if (APP_ERR_NONE == (err = legacy_dbg_go((unsigned char*)data, bytelen, 1))) // 'len' is halfwords, call wants bytes
|
for (i = 0; i < len; i ++) data[i] = ntohs(data[i]);
|
for (i = 0; i < len; i ++) data[i] = ntohs(data[i]);
|
}
|
}
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
|
|
// Never actually called from the GDB interface
|
// Never actually called from the GDB interface
|
| Line 223... |
Line 231... |
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
{
|
{
|
if ((err = adbg_select_module(DC_WISHBONE)))
|
if ((err = adbg_select_module(DC_WISHBONE)))
|
{
|
{
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
err = adbg_wb_burst_read(1, len, adr, (void *)data); // *** is 'len' bits or words?? Call wants words...
|
err = adbg_wb_burst_read(1, len, adr, (void *)data); // *** is 'len' bits or words?? Call wants words...
|
}
|
}
|
| Line 234... |
Line 243... |
{
|
{
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x4, adr, len)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x4, adr, len)))
|
err = legacy_dbg_go((unsigned char*)data, len, 1);
|
err = legacy_dbg_go((unsigned char*)data, len, 1);
|
}
|
}
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
|
|
|
|
| Line 252... |
Line 262... |
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
{
|
{
|
if ((err = adbg_select_module(DC_WISHBONE)))
|
if ((err = adbg_select_module(DC_WISHBONE)))
|
{
|
{
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
err = adbg_wb_burst_write((void *)data, 4, len, adr); // 'len' is words.
|
err = adbg_wb_burst_write((void *)data, 4, len, adr); // 'len' is words.
|
}
|
}
|
| Line 266... |
Line 277... |
for (i = 0; i < len; i ++) data[i] = ntohl(data[i]);
|
for (i = 0; i < len; i ++) data[i] = ntohl(data[i]);
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, bytelen)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, bytelen)))
|
err = legacy_dbg_go((unsigned char*)data, bytelen, 0); // 'len' is words, call wants bytes
|
err = legacy_dbg_go((unsigned char*)data, bytelen, 0); // 'len' is words, call wants bytes
|
}
|
}
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
|
|
|
|
| Line 284... |
Line 296... |
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
{
|
{
|
if ((err = adbg_select_module(DC_WISHBONE)))
|
if ((err = adbg_select_module(DC_WISHBONE)))
|
{
|
{
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
err = adbg_wb_burst_write((void *)data, 2, len, adr); // 'len' is (half)words
|
err = adbg_wb_burst_write((void *)data, 2, len, adr); // 'len' is (half)words
|
}
|
}
|
| Line 298... |
Line 311... |
for (i = 0; i < len; i ++) data[i] = ntohs(data[i]);
|
for (i = 0; i < len; i ++) data[i] = ntohs(data[i]);
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x1, adr, bytelen)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x1, adr, bytelen)))
|
err = legacy_dbg_go((unsigned char*)data, bytelen, 0); // 'len' is 16-bit halfwords, call wants bytes
|
err = legacy_dbg_go((unsigned char*)data, bytelen, 0); // 'len' is 16-bit halfwords, call wants bytes
|
}
|
}
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
|
|
// write a block to wishbone
|
// write a block to wishbone
|
| Line 314... |
Line 328... |
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
{
|
{
|
if ((err = adbg_select_module(DC_WISHBONE)))
|
if ((err = adbg_select_module(DC_WISHBONE)))
|
{
|
{
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
err = adbg_wb_burst_write((void *)data, 1, len, adr); // 'len' is in words...
|
err = adbg_wb_burst_write((void *)data, 1, len, adr); // 'len' is in words...
|
}
|
}
|
| Line 325... |
Line 340... |
{
|
{
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x0, adr, len)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x0, adr, len)))
|
err = legacy_dbg_go((unsigned char*)data, len, 0);
|
err = legacy_dbg_go((unsigned char*)data, len, 0);
|
}
|
}
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
|
|
|
|
| Line 339... |
Line 355... |
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
{
|
{
|
if ((err = adbg_select_module(DC_CPU0)))
|
if ((err = adbg_select_module(DC_CPU0)))
|
{
|
{
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
err = adbg_wb_burst_read(4, 1, adr, (void *) data); // All CPU register reads / writes are bursts
|
err = adbg_wb_burst_read(4, 1, adr, (void *) data); // All CPU register reads / writes are bursts
|
}
|
}
|
| Line 351... |
Line 368... |
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0)))
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, 4)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, 4)))
|
if (APP_ERR_NONE == (err = legacy_dbg_go((unsigned char*)data, 4, 1)))
|
if (APP_ERR_NONE == (err = legacy_dbg_go((unsigned char*)data, 4, 1)))
|
*data = ntohl(*data);
|
*data = ntohl(*data);
|
}
|
}
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
debug("dbg_cpu_read(), addr 0x%X, data[0] = 0x%X\n", adr, data[0]);
|
debug("dbg_cpu_read(), addr 0x%X, data[0] = 0x%X\n", adr, data[0]);
|
return err;
|
return err;
|
}
|
}
|
|
|
| Line 365... |
Line 383... |
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
{
|
{
|
if ((err = adbg_select_module(DC_CPU0)))
|
if ((err = adbg_select_module(DC_CPU0)))
|
{
|
{
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
err = adbg_wb_burst_read(4, count, adr, (void *) data); // All CPU register reads / writes are bursts
|
err = adbg_wb_burst_read(4, count, adr, (void *) data); // All CPU register reads / writes are bursts
|
}
|
}
|
| Line 379... |
Line 398... |
err = APP_ERR_NONE;
|
err = APP_ERR_NONE;
|
for(i = 0; i < count; i++) {
|
for(i = 0; i < count; i++) {
|
err |= dbg_cpu0_read(readaddr++, &data[i]);
|
err |= dbg_cpu0_read(readaddr++, &data[i]);
|
}
|
}
|
}
|
}
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
debug("dbg_cpu_read_block(), addr 0x%X, count %i, data[0] = 0x%X\n", adr, count, data[0]);
|
debug("dbg_cpu_read_block(), addr 0x%X, count %i, data[0] = 0x%X\n", adr, count, data[0]);
|
return err;
|
return err;
|
}
|
}
|
|
|
| Line 393... |
Line 413... |
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
{
|
{
|
if ((err = adbg_select_module(DC_CPU0)))
|
if ((err = adbg_select_module(DC_CPU0)))
|
{
|
{
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
err = adbg_wb_burst_write((void *)&data, 4, 1, adr);
|
err = adbg_wb_burst_write((void *)&data, 4, 1, adr);
|
}
|
}
|
| Line 406... |
Line 427... |
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0)))
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, 4)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, 4)))
|
err = legacy_dbg_go((unsigned char*)&data, 4, 0);
|
err = legacy_dbg_go((unsigned char*)&data, 4, 0);
|
}
|
}
|
debug("cpu0_write, adr 0x%X, data 0x%X, ret %i\n", adr, data, err);
|
debug("cpu0_write, adr 0x%X, data 0x%X, ret %i\n", adr, data, err);
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
|
|
/* write multiple cpu registers to cpu0. This is assumed to be an OR32 CPU, with 32-bit regs. */
|
/* write multiple cpu registers to cpu0. This is assumed to be an OR32 CPU, with 32-bit regs. */
|
| Line 419... |
Line 441... |
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
{
|
{
|
if ((err = adbg_select_module(DC_CPU0)))
|
if ((err = adbg_select_module(DC_CPU0)))
|
{
|
{
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
err = adbg_wb_burst_write((void *)data, 4, count, adr);
|
err = adbg_wb_burst_write((void *)data, 4, count, adr);
|
}
|
}
|
| Line 434... |
Line 457... |
for(i = 0; i < count; i++) {
|
for(i = 0; i < count; i++) {
|
err |= dbg_cpu0_write(writeaddr++, data[i]);
|
err |= dbg_cpu0_write(writeaddr++, data[i]);
|
}
|
}
|
}
|
}
|
debug("cpu0_write_block, adr 0x%X, data[0] 0x%X, count %i, ret %i\n", adr, data[0], count, err);
|
debug("cpu0_write_block, adr 0x%X, data[0] 0x%X, count %i, ret %i\n", adr, data[0], count, err);
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
|
|
/* write a debug unit cpu module register
|
/* write a debug unit cpu module register
|
| Line 450... |
Line 474... |
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
{
|
{
|
if ((err = adbg_select_module(DC_CPU0))) {
|
if ((err = adbg_select_module(DC_CPU0))) {
|
printf("Failed to set chain to 0x%X\n", DC_CPU0);
|
printf("Failed to set chain to 0x%X\n", DC_CPU0);
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
if((err = adbg_ctrl_write(DBG_CPU0_REG_STATUS, &dataword, 2))) {
|
if((err = adbg_ctrl_write(DBG_CPU0_REG_STATUS, &dataword, 2))) {
|
printf("Failed to write chain to 0x%X control reg 0x%X\n", DC_CPU0,DBG_CPU0_REG_STATUS ); // Only 2 bits: Reset, Stall
|
printf("Failed to write chain to 0x%X control reg 0x%X\n", DC_CPU0,DBG_CPU0_REG_STATUS ); // Only 2 bits: Reset, Stall
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
}
|
}
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
{
|
{
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0)))
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0)))
|
err = legacy_dbg_ctrl(data & 2, data &1);
|
err = legacy_dbg_ctrl(data & 2, data &1);
|
}
|
}
|
debug("cpu0_write_ctrl(): set reg to 0x%X\n", data);
|
debug("cpu0_write_ctrl(): set reg to 0x%X\n", data);
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
|
|
|
|
| Line 483... |
Line 510... |
// reset is bit 1, stall is bit 0 in *data
|
// reset is bit 1, stall is bit 0 in *data
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
{
|
{
|
if ((err = adbg_select_module(DC_CPU0))) {
|
if ((err = adbg_select_module(DC_CPU0))) {
|
printf("Failed to set chain to 0x%X\n", DC_CPU0);
|
printf("Failed to set chain to 0x%X\n", DC_CPU0);
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
if ((err = adbg_ctrl_read(DBG_CPU0_REG_STATUS, &dataword, 2))) {
|
if ((err = adbg_ctrl_read(DBG_CPU0_REG_STATUS, &dataword, 2))) {
|
printf("Failed to read chain 0x%X control reg 0x%X\n", DC_CPU0, DBG_CPU0_REG_STATUS);
|
printf("Failed to read chain 0x%X control reg 0x%X\n", DC_CPU0, DBG_CPU0_REG_STATUS);
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
*data = dataword;
|
*data = dataword;
|
}
|
}
|
| Line 501... |
Line 530... |
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0)))
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0)))
|
err = legacy_dbg_ctrl_read(&r, &s);
|
err = legacy_dbg_ctrl_read(&r, &s);
|
*data = (r << 1) | s;
|
*data = (r << 1) | s;
|
debug("api cpu0 read ctrl: r = %i, s = %i, data = %i\n", r, s, *data);
|
debug("api cpu0 read ctrl: r = %i, s = %i, data = %i\n", r, s, *data);
|
}
|
}
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
|
|
// CPU1 Functions. Note that 2 CPUs are not currently supported by GDB, so these are never actually
|
// CPU1 Functions. Note that 2 CPUs are not currently supported by GDB, so these are never actually
|
| Line 518... |
Line 547... |
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
{
|
{
|
if ((err = adbg_select_module(DC_CPU1)))
|
if ((err = adbg_select_module(DC_CPU1)))
|
{
|
{
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
err = adbg_wb_burst_read(4, 1, adr, (void *) data); // All CPU register reads / writes are bursts
|
err = adbg_wb_burst_read(4, 1, adr, (void *) data); // All CPU register reads / writes are bursts
|
}
|
}
|
| Line 530... |
Line 560... |
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1)))
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, 4)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, 4)))
|
err = legacy_dbg_go((unsigned char*)data, 4, 1);
|
err = legacy_dbg_go((unsigned char*)data, 4, 1);
|
*data = ntohl(*data);
|
*data = ntohl(*data);
|
}
|
}
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
|
|
|
|
| Line 545... |
Line 576... |
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
{
|
{
|
if ((err = adbg_select_module(DC_CPU0)))
|
if ((err = adbg_select_module(DC_CPU0)))
|
{
|
{
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
err = adbg_wb_burst_write((void *)&data, 4, 1, adr);
|
err = adbg_wb_burst_write((void *)&data, 4, 1, adr);
|
}
|
}
|
| Line 557... |
Line 589... |
data = ntohl(data);
|
data = ntohl(data);
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1)))
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, 4)))
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, 4)))
|
err = legacy_dbg_go((unsigned char*)&data, 4, 0);
|
err = legacy_dbg_go((unsigned char*)&data, 4, 0);
|
}
|
}
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
|
|
|
|
| Line 572... |
Line 605... |
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
{
|
{
|
if ((err = adbg_select_module(DC_CPU1))) {
|
if ((err = adbg_select_module(DC_CPU1))) {
|
printf("Failed to set chain to 0x%X\n", DC_CPU1);
|
printf("Failed to set chain to 0x%X\n", DC_CPU1);
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
if((err = adbg_ctrl_write(DBG_CPU1_REG_STATUS, &dataword, 2))) {
|
if((err = adbg_ctrl_write(DBG_CPU1_REG_STATUS, &dataword, 2))) {
|
printf("Failed to write chain to 0x%X control reg 0x%X\n", DC_CPU1,DBG_CPU0_REG_STATUS ); // Only 2 bits: Reset, Stall
|
printf("Failed to write chain to 0x%X control reg 0x%X\n", DC_CPU1,DBG_CPU0_REG_STATUS ); // Only 2 bits: Reset, Stall
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
}
|
}
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
{
|
{
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1)))
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1)))
|
err = legacy_dbg_ctrl(data & 2, data & 1);
|
err = legacy_dbg_ctrl(data & 2, data & 1);
|
}
|
}
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
|
|
|
|
| Line 603... |
Line 639... |
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
{
|
{
|
if ((err = adbg_select_module(DC_CPU1))) {
|
if ((err = adbg_select_module(DC_CPU1))) {
|
printf("Failed to set chain to 0x%X\n", DC_CPU1);
|
printf("Failed to set chain to 0x%X\n", DC_CPU1);
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
if ((err = adbg_ctrl_read(DBG_CPU1_REG_STATUS, &dataword, 2))) {
|
if ((err = adbg_ctrl_read(DBG_CPU1_REG_STATUS, &dataword, 2))) {
|
printf("Failed to read chain 0x%X control reg 0x%X\n", DC_CPU0, DBG_CPU1_REG_STATUS);
|
printf("Failed to read chain 0x%X control reg 0x%X\n", DC_CPU0, DBG_CPU1_REG_STATUS);
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
*data = dataword;
|
*data = dataword;
|
}
|
}
|
| Line 620... |
Line 658... |
int r, s;
|
int r, s;
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1)))
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1)))
|
err = legacy_dbg_ctrl_read(&r, &s);
|
err = legacy_dbg_ctrl_read(&r, &s);
|
*data = (r << 1) | s;
|
*data = (r << 1) | s;
|
}
|
}
|
|
cable_flush();
|
pthread_mutex_unlock(&dbg_access_mutex);
|
pthread_mutex_unlock(&dbg_access_mutex);
|
return err;
|
return err;
|
}
|
}
|
|
|
|
|
