URL https://opencores.org/ocsvn/adv_debug_sys/adv_debug_sys/trunk

Subversion Repositories adv_debug_sys

[/] [adv_debug_sys/] [trunk/] [Software/] [adv_jtag_bridge/] [or32_selftest.h] - Diff between revs 8 and 32

Rev 8	Rev 32
Line 1...	Line 1...

`#ifndef _JP2_SELFTEST_H_`	`#ifndef _OR32_SELFTEST_H_`
`#define _JP2_SELFTEST_H_`	`#define _OR32_SELFTEST_H_`

`// Static memory controller defines`	`// Static memory controller defines`
`#define MC_BAR_0 0x00`	`#define MC_BAR_0 0x00`
`#define MC_AMR_0 0x04`	`#define MC_AMR_0 0x04`
`#define MC_WTR_0 0x30`	`#define MC_WTR_0 0x30`
Line 72...	Line 72...
`int test_sdram_2(void);`	`int test_sdram_2(void);`
`int test_sram(void);`	`int test_sram(void);`
`int test_or1k_cpu0(void);`	`int test_or1k_cpu0(void);`
`//int test_8051_cpu1(void);`	`//int test_8051_cpu1(void);`

`#endif // _JP2_SELFTEST_H_`	`#endif // _OR32_SELFTEST_H_`


`No newline at end of file`	`No newline at end of file`