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// $Id: aeMB_ctrl.v,v 1.8 2007-11-14 23:19:24 sybreon Exp $
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// $Id: aeMB_ctrl.v,v 1.9 2007-11-15 09:26:43 sybreon Exp $
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//
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//
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// AEMB CONTROL UNIT
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// AEMB CONTROL UNIT
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//
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//
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// Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@aeste.net>
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// Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@aeste.net>
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//
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//
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//
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//
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// You should have received a copy of the GNU Lesser General Public
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// You should have received a copy of the GNU Lesser General Public
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// License along with AEMB. If not, see <http://www.gnu.org/licenses/>.
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// License along with AEMB. If not, see <http://www.gnu.org/licenses/>.
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.8 2007/11/14 23:19:24 sybreon
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// Fixed minor typo.
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//
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// Revision 1.7 2007/11/14 22:14:34 sybreon
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// Revision 1.7 2007/11/14 22:14:34 sybreon
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// Changed interrupt handling system (reported by M. Ettus).
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// Changed interrupt handling system (reported by M. Ettus).
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//
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//
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// Revision 1.6 2007/11/10 16:39:38 sybreon
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// Revision 1.6 2007/11/10 16:39:38 sybreon
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// Upgraded license to LGPLv3.
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// Upgraded license to LGPLv3.
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end // else: !if(fSKIP)
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end // else: !if(fSKIP)
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// --- DATA WISHBONE ----------------------------------
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// --- DATA WISHBONE ----------------------------------
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wire fDACK = !(rDWBSTB ^ dwb_ack_i);
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wire fDACK = !(dwb_stb_o ^ dwb_ack_i);
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reg rDWBSTB, xDWBSTB;
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reg rDWBSTB, xDWBSTB;
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reg rDWBWRE, xDWBWRE;
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reg rDWBWRE, xDWBWRE;
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assign dwb_stb_o = rDWBSTB;
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assign dwb_stb_o = rDWBSTB;
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end
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end
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// --- FSL WISHBONE -----------------------------------
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// --- FSL WISHBONE -----------------------------------
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wire fFACK = !(rFSLSTB ^ fsl_ack_i);
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wire fFACK = !(fsl_stb_o ^ fsl_ack_i);
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reg rFSLSTB, xFSLSTB;
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reg rFSLSTB, xFSLSTB;
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reg rFSLWRE, xFSLWRE;
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reg rFSLWRE, xFSLWRE;
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assign fsl_stb_o = rFSLSTB;
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assign fsl_stb_o = rFSLSTB;
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