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// $Id: aeMB_xecu.v,v 1.2 2007-11-02 19:20:58 sybreon Exp $
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// $Id: aeMB_xecu.v,v 1.3 2007-11-03 08:34:55 sybreon Exp $
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//
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//
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// AEMB MAIN EXECUTION ALU
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// AEMB MAIN EXECUTION ALU
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//
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//
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// Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@aeste.net>
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// Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@aeste.net>
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//
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//
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// License along with this library; if not, write to the Free Software
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// License along with this library; if not, write to the Free Software
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
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// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
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// USA
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// USA
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//
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//
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.2 2007/11/02 19:20:58 sybreon
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// Added better (beta) interrupt support.
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// Changed MSR_IE to disabled at reset as per MB docs.
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//
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// Revision 1.1 2007/11/02 03:25:41 sybreon
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// Revision 1.1 2007/11/02 03:25:41 sybreon
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// New EDK 3.2 compatible design with optional barrel-shifter and multiplier.
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// New EDK 3.2 compatible design with optional barrel-shifter and multiplier.
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// Fixed various minor data hazard bugs.
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// Fixed various minor data hazard bugs.
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// Code compatible with -O0/1/2/3/s generated code.
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// Code compatible with -O0/1/2/3/s generated code.
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//
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//
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input [31:0] rREGA, rREGB;
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input [31:0] rREGA, rREGB;
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input [1:0] rMXSRC, rMXTGT;
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input [1:0] rMXSRC, rMXTGT;
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input [4:0] rRA;
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input [4:0] rRA;
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input [2:0] rMXALU;
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input [2:0] rMXALU;
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input rBRA, rDLY;
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input rBRA, rDLY;
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//input [1:0] rXCE;
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//input [1:0] rXCE;
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input [31:0] rSIMM;
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input [31:0] rSIMM;
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input [15:0] rIMM;
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input [15:0] rIMM;
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input [5:0] rOPC;
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input [5:0] rOPC;
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input [4:0] rRD;
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input [4:0] rRD;
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2'o1: xDWBSEL <= (wADD[1]) ? 4'h3 : 4'hC;
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2'o1: xDWBSEL <= (wADD[1]) ? 4'h3 : 4'hC;
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2'o2: xDWBSEL <= 4'hF;
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2'o2: xDWBSEL <= 4'hF;
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default: xDWBSEL <= 4'hX;
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default: xDWBSEL <= 4'hX;
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endcase // case (rOPC[1:0])
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endcase // case (rOPC[1:0])
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/*
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case (wADD[1:0])
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2'o0: case (rOPC[1:0])
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2'o0: xDWBSEL <= 4'h8;
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2'o1: xDWBSEL <= 4'hC;
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default: xDWBSEL <= 4'hF;
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endcase // case (rOPC[1:0])
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2'o1: xDWBSEL <= 4'h4;
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2'o2: xDWBSEL <= (rOPC[0]) ? 4'h3 : 4'h2;
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2'o3: xDWBSEL <= 4'h1;
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endcase // case (wADD[1:0])
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*/
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// --- SYNC ---
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// --- SYNC ---
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always @(posedge gclk)
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always @(posedge gclk)
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if (grst) begin
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if (grst) begin
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//rMSR_IE <= 1'b1;
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/*AUTORESET*/
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/*AUTORESET*/
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// Beginning of autoreset for uninitialized flops
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// Beginning of autoreset for uninitialized flops
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rDWBSEL <= 4'h0;
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rDWBSEL <= 4'h0;
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rMSR_BE <= 1'h0;
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rMSR_BE <= 1'h0;
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rMSR_BIP <= 1'h0;
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rMSR_BIP <= 1'h0;
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