URL
https://opencores.org/ocsvn/aemb/aemb/trunk
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
Rev 49 |
Rev 73 |
Line 1... |
Line 1... |
#!/bin/sh
|
#!/bin/sh
|
# $Id: cversim,v 1.3 2007-11-05 10:59:31 sybreon Exp $
|
# $Id: cversim,v 1.4 2007-11-30 17:08:30 sybreon Exp $
|
# $Log: not supported by cvs2svn $
|
# $Log: not supported by cvs2svn $
|
|
# Revision 1.3 2007/11/05 10:59:31 sybreon
|
|
# Added random seed for simulation.
|
|
#
|
# Revision 1.2 2007/04/12 20:21:33 sybreon
|
# Revision 1.2 2007/04/12 20:21:33 sybreon
|
# Moved testbench into /sim/verilog.
|
# Moved testbench into /sim/verilog.
|
# Simulation cleanups.
|
# Simulation cleanups.
|
#
|
#
|
# Revision 1.1 2007/03/09 17:41:55 sybreon
|
# Revision 1.1 2007/03/09 17:41:55 sybreon
|
# initial import
|
# initial import
|
#
|
#
|
RANDOM=$(date +%s)
|
RANDOM=$(date +%s)
|
echo "parameter randseed = $RANDOM;" > random.v
|
echo "parameter randseed = $RANDOM;" > random.v
|
cver -q -w $@ ../rtl/verilog/*.v
|
cver -q -w +define+AEMB_SIMULATION_KERNEL $@ ../rtl/verilog/*.v
|
cver -q -w +define+AEMB_SIMULATION_KERNEL $@ ../rtl/verilog/*.v
|
cver -q -w +define+AEMB_SIMULATION_KERNEL $@ ../rtl/verilog/*.v
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.