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/* $Id: aeMB2_aslu.v,v 1.8 2008-01-09 19:12:59 sybreon Exp $
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/* $Id: aeMB2_aslu.v,v 1.9 2008-01-09 19:17:33 sybreon Exp $
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**
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**
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** AEMB2 INTEGER ARITHMETIC SHIFT LOGIC UNIT
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** AEMB2 INTEGER ARITHMETIC SHIFT LOGIC UNIT
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**
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**
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** Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@aeste.net>
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** Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@aeste.net>
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**
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**
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Implemented as a 2-stage multiplier in order to increase clock
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Implemented as a 2-stage multiplier in order to increase clock
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speed. */
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speed. */
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reg [31:0] rRES_MUL;
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reg [31:0] rRES_MUL;
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always @(posedge clk_i)
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always @(posedge clk_i) if (ena_i) begin
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rMUL_MA <= #1 rRES_MUL;
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rMUL_MA <= #1 rRES_MUL;
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always @(posedge clk_i)
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rRES_MUL <= #1 (rOPA * rOPB);
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rRES_MUL <= #1 (rOPA * rOPB);
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end
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/*
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/*
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BARREL SHIFTER
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BARREL SHIFTER
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This can be potentially made 2-stage if it is a
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This can be potentially made 2-stage if it is a
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end // if (ena_i)
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end // if (ena_i)
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endmodule // aeMB2_aslu
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endmodule // aeMB2_aslu
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/* $Log: not supported by cvs2svn $
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/* $Log: not supported by cvs2svn $
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/* Revision 1.8 2008/01/09 19:12:59 sybreon
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/* multiplier issues
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/*
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/* Revision 1.7 2007/12/17 12:53:27 sybreon
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/* Revision 1.7 2007/12/17 12:53:27 sybreon
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/* Fixed Carry bit bug.
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/* Fixed Carry bit bug.
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/*
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/*
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/* Revision 1.6 2007/12/16 20:38:06 sybreon
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/* Revision 1.6 2007/12/16 20:38:06 sybreon
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/* Minor optimisations.
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/* Minor optimisations.
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