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/* $Id: aeMB2_edk32.v,v 1.6 2007-12-16 03:25:22 sybreon Exp $
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/* $Id: aeMB2_edk32.v,v 1.7 2007-12-17 12:53:13 sybreon Exp $
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**
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**
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** AEMB2 HI-PERFORMANCE CPU
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** AEMB2 HI-PERFORMANCE CPU
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**
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**
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** Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@aeste.net>
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** Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@aeste.net>
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**
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**
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$writeh(" M=",rOPM_OF);
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$writeh(" M=",rOPM_OF);
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$writeh(" MSR=", wMSR," ");
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$writeh(" MSR=", wMSR," ");
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case (rALU_OF)
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case (rALU_OF)
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3'o0: if (dwb_stb_o)
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3'o0: $write(" ADD");
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$write(" RAM");
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3'o1: $write(" BSF");
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else
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3'o2: $write(" SLM");
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$write(" ADD");
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3'o1: $write(" LOG");
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3'o2: $write(" SFT");
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3'o3: $write(" MOV");
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3'o3: $write(" MOV");
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3'o4: $write(" MUL");
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3'o5: $write(" BSF");
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default: $write(" XXX");
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default: $write(" XXX");
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endcase // case (rALU_OF)
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endcase // case (rALU_OF)
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// MA
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// MA
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$write ("\t| ");
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$write ("\t| ");
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// synopsys translate_on
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// synopsys translate_on
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endmodule // aeMB2_edk32
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endmodule // aeMB2_edk32
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/* $Log: not supported by cvs2svn $
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/* $Log: not supported by cvs2svn $
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/* Revision 1.6 2007/12/16 03:25:22 sybreon
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/* Replaced OF/ID blocks with combined block.
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/*
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/* Revision 1.5 2007/12/13 21:25:41 sybreon
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/* Revision 1.5 2007/12/13 21:25:41 sybreon
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/* Further optimisations (speed + size).
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/* Further optimisations (speed + size).
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/*
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/*
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/* Revision 1.4 2007/12/13 20:12:11 sybreon
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/* Revision 1.4 2007/12/13 20:12:11 sybreon
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/* Code cleanup + minor speed regression.
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/* Code cleanup + minor speed regression.
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