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/* $Id: aeMB2_edk32.v,v 1.7 2007-12-17 12:53:13 sybreon Exp $
/* $Id: aeMB2_edk32.v,v 1.8 2007-12-18 18:54:36 sybreon Exp $
**
**
** AEMB2 HI-PERFORMANCE CPU
** AEMB2 HI-PERFORMANCE CPU
**
**
** Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@aeste.net>
** Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@aeste.net>
**
**
Line 309... Line 309...
         .pha_i                         (pha_i),
         .pha_i                         (pha_i),
         .clk_i                         (clk_i),
         .clk_i                         (clk_i),
         .rst_i                         (rst_i),
         .rst_i                         (rst_i),
         .ena_i                         (ena_i));
         .ena_i                         (ena_i));
 
 
   // synopsys translate_off
 
   wire [31:0]           iwb_adr = {iwb_adr_o, 2'd0};
 
   wire [31:0]           dwb_adr = {dwb_adr_o, 2'd0};
 
   wire [31:0]           wMSR = aslu.wMSR[31:0];
 
 
 
   always @(posedge clk_i) if (ena_i) begin
 
 
 
      $write ("\n", ($stime/10));
 
      $writeh (" T", pha_i);
 
      $writeh(" PC=", iwb_adr);
 
 
 
      $writeh ("\t| ");
 
 
 
      case (rOPC_IF)
 
        6'o00: if (rRD_IF == 0) $write("   "); else $write("ADD");
 
        6'o01: $write("SUB");
 
        6'o02: $write("ADDC");
 
        6'o03: $write("SUBC");
 
        6'o04: $write("ADDK");
 
        6'o05: case (rIMM_IF[1:0])
 
                 2'o0: $write("SUBK");
 
                 2'o1: $write("CMP");
 
                 2'o3: $write("CMPU");
 
                 default: $write("XXX");
 
               endcase // case (rIMM_IF[1:0])
 
        6'o06: $write("ADDKC");
 
        6'o07: $write("SUBKC");
 
 
 
        6'o10: $write("ADDI");
 
        6'o11: $write("SUBI");
 
        6'o12: $write("ADDIC");
 
        6'o13: $write("SUBIC");
 
        6'o14: $write("ADDIK");
 
        6'o15: $write("SUBIK");
 
        6'o16: $write("ADDIKC");
 
        6'o17: $write("SUBIKC");
 
 
 
        6'o20: $write("MUL");
 
        6'o21: case (rALT_IF[10:9])
 
                 2'o0: $write("BSRL");
 
                 2'o1: $write("BSRA");
 
                 2'o2: $write("BSLL");
 
                 default: $write("XXX");
 
               endcase // case (rALT_IF[10:9])
 
        6'o22: $write("IDIV");
 
 
 
        6'o30: $write("MULI");
 
        6'o31: case (rALT_IF[10:9])
 
                 2'o0: $write("BSRLI");
 
                 2'o1: $write("BSRAI");
 
                 2'o2: $write("BSLLI");
 
                 default: $write("XXX");
 
               endcase // case (rALT_IF[10:9])
 
        6'o33: case (rRB_IF[4:2])
 
                 3'o0: $write("GET");
 
                 3'o4: $write("PUT");
 
                 3'o2: $write("NGET");
 
                 3'o6: $write("NPUT");
 
                 3'o1: $write("CGET");
 
                 3'o5: $write("CPUT");
 
                 3'o3: $write("NCGET");
 
                 3'o7: $write("NCPUT");
 
               endcase // case (rRB_IF[4:2])
 
 
 
        6'o40: $write("OR");
 
        6'o41: $write("AND");
 
        6'o42: if (rRD_IF == 0) $write("   "); else $write("XOR");
 
        6'o43: $write("ANDN");
 
        6'o44: case (rIMM_IF[6:5])
 
                 2'o0: $write("SRA");
 
                 2'o1: $write("SRC");
 
                 2'o2: $write("SRL");
 
                 2'o3: if (rIMM_IF[0]) $write("SEXT16"); else $write("SEXT8");
 
               endcase // case (rIMM_IF[6:5])
 
 
 
        6'o45: $write("MOV");
 
        6'o46: case (rRA_IF[3:2])
 
                 3'o0: $write("BR");
 
                 3'o1: $write("BRL");
 
                 3'o2: $write("BRA");
 
                 3'o3: $write("BRAL");
 
               endcase // case (rRA_IF[3:2])
 
 
 
        6'o47: case (rRD_IF[2:0])
 
                 3'o0: $write("BEQ");
 
                 3'o1: $write("BNE");
 
                 3'o2: $write("BLT");
 
                 3'o3: $write("BLE");
 
                 3'o4: $write("BGT");
 
                 3'o5: $write("BGE");
 
                 default: $write("XXX");
 
               endcase // case (rRD_IF[2:0])
 
 
 
        6'o50: $write("ORI");
 
        6'o51: $write("ANDI");
 
        6'o52: $write("XORI");
 
        6'o53: $write("ANDNI");
 
        6'o54: $write("IMMI");
 
        6'o55: case (rRD_IF[1:0])
 
                 2'o0: $write("RTSD");
 
                 2'o1: $write("RTID");
 
                 2'o2: $write("RTBD");
 
                 default: $write("XXX");
 
               endcase // case (rRD_IF[1:0])
 
        6'o56: case (rRA_IF[3:2])
 
                 3'o0: $write("BRI");
 
                 3'o1: $write("BRLI");
 
                 3'o2: $write("BRAI");
 
                 3'o3: $write("BRALI");
 
               endcase // case (rRA_IF[3:2])
 
        6'o57: case (rRD_IF[2:0])
 
                 3'o0: $write("BEQI");
 
                 3'o1: $write("BNEI");
 
                 3'o2: $write("BLTI");
 
                 3'o3: $write("BLEI");
 
                 3'o4: $write("BGTI");
 
                 3'o5: $write("BGEI");
 
                 default: $write("XXX");
 
               endcase // case (rRD_IF[2:0])
 
 
 
        6'o60: $write("LBU");
 
        6'o61: $write("LHU");
 
        6'o62: $write("LW");
 
        6'o64: $write("SB");
 
        6'o65: $write("SH");
 
        6'o66: $write("SW");
 
 
 
        6'o70: $write("LBUI");
 
        6'o71: $write("LHUI");
 
        6'o72: $write("LWI");
 
        6'o74: $write("SBI");
 
        6'o75: $write("SHI");
 
        6'o76: $write("SWI");
 
 
 
        default: $write("XXX");
 
      endcase // case (rOPC_IF)
 
 
 
      case (rOPC_IF[3])
 
        1'b1: $writeh("\t r",rRD_IF,", r",rRA_IF,", h",rIMM_IF);
 
        1'b0: $writeh("\t r",rRD_IF,", r",rRA_IF,", r",rRB_IF,"  ");
 
      endcase // case (rOPC_IF[3])
 
 
 
      if (bpcu.fHZD)
 
        $write ("*");
 
 
 
      // ALU
 
      $write("\t|");
 
      $writeh(" A=",rOPA_OF);
 
      $writeh(" B=",rOPB_OF);
 
      $writeh(" C=",rOPX_OF);
 
      $writeh(" M=",rOPM_OF);
 
 
 
      $writeh(" MSR=", wMSR," ");
 
 
 
      case (rALU_OF)
 
        3'o0: $write(" ADD");
 
        3'o1: $write(" BSF");
 
        3'o2: $write(" SLM");
 
        3'o3: $write(" MOV");
 
        default: $write(" XXX");
 
      endcase // case (rALU_OF)
 
 
 
      // MA
 
      $write ("\t| ");
 
      if (dwb_stb_o)
 
        $writeh("@",rRES_EX);
 
      else
 
        $writeh("=",rRES_EX);
 
 
 
 
 
      case (rBRA)
 
        2'b00: $write(" ");
 
        2'b01: $write(".");
 
        2'b10: $write("-");
 
        2'b11: $write("+");
 
      endcase // case (rBRA)
 
 
 
      // WRITEBACK
 
      $write("\t|");
 
 
 
      if (|rRD_MA) begin
 
         case (rOPD_MA)
 
           2'o2: begin
 
              if (rSEL_MA != 4'h0) $writeh("R",rRD_MA,"=RAM(",regf.rREGD,")");
 
              if (rSEL_MA == 4'h0) $writeh("R",rRD_MA,"=FSL(",regf.rREGD,")");
 
           end
 
           2'o1: $writeh("R",rRD_MA,"=LNK(",regf.rREGD,")");
 
           2'o0: $writeh("R",rRD_MA,"=ALU(",regf.rREGD,")");
 
         endcase // case (rOPD_MA)
 
      end
 
 
 
      /*
 
      // STORE
 
      if (dwb_stb_o & dwb_wre_o) begin
 
         $writeh("RAM(", dwb_adr ,")=", dwb_dat_o);
 
         case (dwb_sel_o)
 
           4'hF: $write(":L");
 
           4'h3,4'hC: $write(":W");
 
           4'h1,4'h2,4'h4,4'h8: $write(":B");
 
         endcase // case (dwb_sel_o)
 
 
 
      end
 
       */
 
   end // if (ena_i)
 
 
 
   // synopsys translate_on
 
 
 
endmodule // aeMB2_edk32
endmodule // aeMB2_edk32
 
 
/* $Log: not supported by cvs2svn $
/* $Log: not supported by cvs2svn $
 
/* Revision 1.7  2007/12/17 12:53:13  sybreon
 
/* Changed simulation kernel.
 
/*
/* Revision 1.6  2007/12/16 03:25:22  sybreon
/* Revision 1.6  2007/12/16 03:25:22  sybreon
/* Replaced OF/ID blocks with combined block.
/* Replaced OF/ID blocks with combined block.
/*
/*
/* Revision 1.5  2007/12/13 21:25:41  sybreon
/* Revision 1.5  2007/12/13 21:25:41  sybreon
/* Further optimisations (speed + size).
/* Further optimisations (speed + size).

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