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Rev 82 |
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/* $Id: aeMB2_idmx.v,v 1.3 2007-12-13 20:12:11 sybreon Exp $
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/* $Id: aeMB2_idmx.v,v 1.4 2007-12-13 21:25:41 sybreon Exp $
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**
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**
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** AEMB2 INSTRUCTION DECODE MUX
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** AEMB2 INSTRUCTION DECODE MUX
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**
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**
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** Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@aeste.net>
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** Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@aeste.net>
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**
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**
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/*AUTORESET*/
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/*AUTORESET*/
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// Beginning of autoreset for uninitialized flops
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// Beginning of autoreset for uninitialized flops
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rALU_OF <= 3'h0;
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rALU_OF <= 3'h0;
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// End of automatics
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// End of automatics
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end else if (ena_i) begin
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end else if (ena_i) begin
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/*
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rALU_OF <= #1
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(fSKIP) ? 3'o1 : // NOP
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(fBRA | fMOV) ? 3'o3 :
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(fSFT) ? 3'o2 :
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(fLOG) ? 3'o1 :
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(fMUL) ? 3'o4 :
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(fBSF) ? 3'o5 :
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3'o0;
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*/
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rALU_OF <= #1
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rALU_OF <= #1
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(fSKIP) ? 3'o1 : // NOP
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(fSKIP) ? 3'o1 : // NOP
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(fBRA | fMOV) ? 3'o3 :
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(fBRA | fMOV) ? 3'o1 :
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(fSFT) ? 3'o2 :
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(fSFT) ? 3'o1 :
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(fLOG) ? 3'o1 :
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(fLOG) ? 3'o1 :
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(fMUL) ? 3'o4 :
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(fBSF) ? 3'o2 :
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(fBSF) ? 3'o5 :
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3'o0;
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3'o0;
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end
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end
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/* WB Selector */
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/* WB Selector */
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(fSTR | fRTD | fBCC) ? 3'o7 : // STR/RTD/BCC
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(fSTR | fRTD | fBCC) ? 3'o7 : // STR/RTD/BCC
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(fLOD | fGET) ? 3'o2 : // RAM/FSL
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(fLOD | fGET) ? 3'o2 : // RAM/FSL
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(fBRU) ? 3'o1 : // PCLNK
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(fBRU) ? 3'o1 : // PCLNK
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(fMUL) ? 3'o3 : // MUL
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(fMUL) ? 3'o3 : // MUL
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(|rRD_IF) ? 3'o0 : // ALU
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(|rRD_IF) ? 3'o0 : // ALU
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3'o7; // ALU
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3'o7; // NOP
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end // if (ena_i)
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end // if (ena_i)
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/* Passthrough */
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/* Passthrough */
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always @(posedge clk_i)
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always @(posedge clk_i)
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end // if (ena_i)
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end // if (ena_i)
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endmodule // aeMB2_idmx
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endmodule // aeMB2_idmx
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/* $Log: not supported by cvs2svn $
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/* $Log: not supported by cvs2svn $
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/* Revision 1.3 2007/12/13 20:12:11 sybreon
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/* Code cleanup + minor speed regression.
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/*
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/* Revision 1.2 2007/12/12 19:16:59 sybreon
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/* Revision 1.2 2007/12/12 19:16:59 sybreon
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/* Minor optimisations (~10% faster)
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/* Minor optimisations (~10% faster)
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/*
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/*
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/* Revision 1.1 2007/12/11 00:43:17 sybreon
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/* Revision 1.1 2007/12/11 00:43:17 sybreon
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/* initial import
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/* initial import
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