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[/] [aemb/] [trunk/] [rtl/] [verilog/] [aeMB2_bsft.v] - Diff between revs 118 and 131

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/* $Id: aeMB2_bsft.v,v 1.1 2008-04-18 00:21:52 sybreon Exp $
/* $Id: aeMB2_bsft.v,v 1.2 2008-04-26 01:09:05 sybreon Exp $
**
**
** AEMB2 EDK 6.2 COMPATIBLE CORE
** AEMB2 EDK 6.2 COMPATIBLE CORE
** Copyright (C) 2004-2008 Shawn Tan <shawn.tan@aeste.net>
** Copyright (C) 2004-2008 Shawn Tan <shawn.tan@aeste.net>
**
**
** This file is part of AEMB.
** This file is part of AEMB.
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** Public License for more details.
** Public License for more details.
**
**
** You should have received a copy of the GNU Lesser General Public
** You should have received a copy of the GNU Lesser General Public
** License along with AEMB. If not, see <http:**www.gnu.org/licenses/>.
** License along with AEMB. If not, see <http:**www.gnu.org/licenses/>.
*/
*/
 
 
/**
/**
 * Two Cycle Barrel Shift Unit
 * Two Cycle Barrel Shift Unit
 * @file aeMB2_bsft.v
 * @file aeMB2_bsft.v
 
 
 * This implements a 2 cycle barrel shifter. The design can be further
 * This implements a 2 cycle barrel shifter. The design can be further
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          default: rBSR <= #1 32'hX;
          default: rBSR <= #1 32'hX;
        endcase // case (imm_ex)
        endcase // case (imm_ex)
        imm_ex <= #1 imm_of[10:9]; // delay 1 cycle     
        imm_ex <= #1 imm_of[10:9]; // delay 1 cycle     
     end
     end
 
 
 
 
endmodule // aeMB2_bsft
endmodule // aeMB2_bsft
 
 
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/*
 
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 Revision 1.1  2008/04/18 00:21:52  sybreon
 
 Initial import.
 
*/
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