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[/] [aemb/] [trunk/] [rtl/] [verilog/] [aeMB2_ctrl.v] - Diff between revs 120 and 131

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/* $Id: aeMB2_ctrl.v,v 1.2 2008-04-20 16:34:32 sybreon Exp $
/* $Id: aeMB2_ctrl.v,v 1.3 2008-04-26 01:09:05 sybreon Exp $
**
**
** AEMB2 EDK 6.2 COMPATIBLE CORE
** AEMB2 EDK 6.2 COMPATIBLE CORE
** Copyright (C) 2004-2008 Shawn Tan <shawn.tan@aeste.net>
** Copyright (C) 2004-2008 Shawn Tan <shawn.tan@aeste.net>
**
**
** This file is part of AEMB.
** This file is part of AEMB.
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** Public License for more details.
** Public License for more details.
**
**
** You should have received a copy of the GNU Lesser General Public
** You should have received a copy of the GNU Lesser General Public
** License along with AEMB. If not, see <http:**www.gnu.org/licenses/>.
** License along with AEMB. If not, see <http:**www.gnu.org/licenses/>.
*/
*/
 
 
/**
/**
 * Instruction Decode & Control
 * Instruction Decode & Control
 * @file aeMB2_ctrl.v
 * @file aeMB2_ctrl.v
 
 
 * This is the data decoder that will control the command signals and
 * This is the data decoder that will control the command signals and
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        rd_of <= #1 wRD;
        rd_of <= #1 wRD;
        ra_of <= #1 wRA;
        ra_of <= #1 wRA;
        //rb_of <= #1 wRB;
        //rb_of <= #1 wRB;
        imm_of <= #1 wIMM;
        imm_of <= #1 wIMM;
 
 
     end
     end // if (dena)
 
 
 
 
   // immediate implementation
   // immediate implementation
   reg [15:0]            rIMM0, rIMM1;
   reg [15:0]            rIMM0, rIMM1;
   reg                  rFIM0, rFIM1;
   reg                  rFIM0, rFIM1;
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          2'o1: opa_of <= #1 alu_ex;
          2'o1: opa_of <= #1 alu_ex;
          2'o2: opa_of <= #1 {rpc_if, 2'o0};
          2'o2: opa_of <= #1 {rpc_if, 2'o0};
          2'o3: opa_of <= #1 {rpc_if, 2'o0};
          2'o3: opa_of <= #1 {rpc_if, 2'o0};
        endcase // case (mux_opa)       
        endcase // case (mux_opa)       
 
 
     end
     end // if (dena)
 
 
   // Hazard Detection
   // Hazard Detection
   wire                 wFMUL = (mux_ex == MUX_MUL);
   wire                 wFMUL = (mux_ex == MUX_MUL);
   wire                 wFBSF = (mux_ex == MUX_BSF);
   wire                 wFBSF = (mux_ex == MUX_BSF);
   wire                 wFMEM = (mux_ex == MUX_MEM);
   wire                 wFMEM = (mux_ex == MUX_MEM);
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                                  (wFMUL | wFBSF | wFMEM | wFMOV);
                                  (wFMUL | wFBSF | wFMEM | wFMOV);
   assign               hzd_bpc = (bra_ex[1] & !bra_ex[0]);
   assign               hzd_bpc = (bra_ex[1] & !bra_ex[0]);
 
 
endmodule // aeMB2_ctrl
endmodule // aeMB2_ctrl
 
 
// $Log: not supported by cvs2svn $
 
// Revision 1.1  2008/04/18 00:21:52  sybreon
 
// Initial import.
 
//
 
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/*
 
 $Log: not supported by cvs2svn $
 
 Revision 1.2  2008/04/20 16:34:32  sybreon
 
 Basic version with some features left out.
 
 
 
 Revision 1.1  2008/04/18 00:21:52  sybreon
 
 Initial import.
 
*/
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