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// 382@130
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// 382@130
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module aeMB2_exec (/*AUTOARG*/
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module aeMB2_exec (/*AUTOARG*/
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// Outputs
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// Outputs
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sfr_mx, mul_mx, msr_ex, mem_ex, bsf_mx, bpc_ex, alu_mx, alu_ex,
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sfr_mx, mul_mx, msr_ex, mem_ex, bsf_mx, bpc_ex, alu_mx, alu_ex,
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exc_ill,
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// Inputs
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// Inputs
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rd_of, ra_of, opd_of, opc_of, opb_of, opa_of, imm_of, grst, gpha,
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rd_of, ra_of, opd_of, opc_of, opb_of, opa_of, imm_of, grst, gpha,
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gclk, dena
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gclk, dena
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);
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);
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parameter AEMB_IWB = 32;
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parameter AEMB_IWB = 32;
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input [4:0] ra_of; // To intu0 of aeMB2_intu.v
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input [4:0] ra_of; // To intu0 of aeMB2_intu.v
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input [4:0] rd_of; // To intu0 of aeMB2_intu.v
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input [4:0] rd_of; // To intu0 of aeMB2_intu.v
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// End of automatics
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// End of automatics
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/*AUTOWIRE*/
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/*AUTOWIRE*/
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output exc_ill;
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reg exc_ill; // illegal instruction exception
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//TODO: OPTIMISE!
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wire wILL =
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//(opc_of == 6'o23) | (opc_of == 6'o24) | (opc_of == 6'o25) | (opc_of == 6'o26) | opc_of == 6'o27) |
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//(opc_of == 6'o32) | (opc_of == 6'o34) | (opc_of == 6'o35) | (opc_of == 6'o36) | opc_of == 6'o37) |
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(opc_of == 6'o63) | (opc_of == 6'o67) | (opc_of == 6'o73) | (opc_of == 6'o77); // illegal load/store
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always @(posedge gclk)
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if (grst) begin
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/*AUTORESET*/
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// Beginning of autoreset for uninitialized flops
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exc_ill <= 1'h0;
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// End of automatics
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end else if (dena) begin
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exc_ill <= #1 wILL;
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end
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aeMB2_bsft
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aeMB2_bsft
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#(/*AUTOINSTPARAM*/
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#(/*AUTOINSTPARAM*/
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// Parameters
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// Parameters
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.AEMB_BSF (AEMB_BSF))
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.AEMB_BSF (AEMB_BSF))
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bsft0
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bsft0
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Line 154... |
.dena (dena),
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.dena (dena),
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.gpha (gpha));
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.gpha (gpha));
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endmodule // aeMB2_exec
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endmodule // aeMB2_exec
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/*
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$Log: not supported by cvs2svn $
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Revision 1.3 2008/04/26 01:11:30 sybreon
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Fixed minor typos.
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Revision 1.2 2008/04/26 01:09:06 sybreon
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Passes basic tests. Minor documentation changes to make it compatible with iverilog pre-processor.
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Revision 1.1 2008/04/18 00:21:52 sybreon
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Initial import.
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*/
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No newline at end of file
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No newline at end of file
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