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[/] [aemb/] [trunk/] [rtl/] [verilog/] [aeMB2_memif.v] - Diff between revs 191 and 206

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Rev 191 Rev 206
Line 29... Line 29...
// 89@380
// 89@380
 
 
module aeMB2_memif (/*AUTOARG*/
module aeMB2_memif (/*AUTOARG*/
   // Outputs
   // Outputs
   xwb_wre_o, xwb_tag_o, xwb_stb_o, xwb_sel_o, xwb_mx, xwb_fb,
   xwb_wre_o, xwb_tag_o, xwb_stb_o, xwb_sel_o, xwb_mx, xwb_fb,
   xwb_dat_o, xwb_cyc_o, xwb_adr_o, sel_mx, dwb_wre_o, dwb_tag_o,
   xwb_dat_o, xwb_cyc_o, xwb_adr_o, sel_mx, exc_dwb, dwb_wre_o,
   dwb_stb_o, dwb_sel_o, dwb_mx, dwb_fb, dwb_dat_o, dwb_cyc_o,
   dwb_tag_o, dwb_stb_o, dwb_sel_o, dwb_mx, dwb_fb, dwb_dat_o,
   dwb_adr_o,
   dwb_cyc_o, dwb_adr_o,
   // Inputs
   // Inputs
   xwb_dat_i, xwb_ack_i, sfr_mx, opd_of, opc_of, opb_of, opa_of,
   xwb_dat_i, xwb_ack_i, sfr_mx, opd_of, opc_of, opb_of, opa_of,
   msr_ex, mem_ex, imm_of, grst, gpha, gclk, dwb_dat_i, dwb_ack_i,
   msr_ex, mem_ex, imm_of, grst, gpha, gclk, dwb_dat_i, dwb_ack_i,
   dena
   dena
   );
   );
Line 52... Line 52...
   output [31:0] dwb_mx;                 // From dwbif0 of aeMB2_dwbif.v
   output [31:0] dwb_mx;                 // From dwbif0 of aeMB2_dwbif.v
   output [3:0]          dwb_sel_o;              // From dwbif0 of aeMB2_dwbif.v
   output [3:0]          dwb_sel_o;              // From dwbif0 of aeMB2_dwbif.v
   output               dwb_stb_o;              // From dwbif0 of aeMB2_dwbif.v
   output               dwb_stb_o;              // From dwbif0 of aeMB2_dwbif.v
   output               dwb_tag_o;              // From dwbif0 of aeMB2_dwbif.v
   output               dwb_tag_o;              // From dwbif0 of aeMB2_dwbif.v
   output               dwb_wre_o;              // From dwbif0 of aeMB2_dwbif.v
   output               dwb_wre_o;              // From dwbif0 of aeMB2_dwbif.v
 
   output [1:0]          exc_dwb;                // From dwbif0 of aeMB2_dwbif.v
   output [3:0]          sel_mx;                 // From dwbif0 of aeMB2_dwbif.v
   output [3:0]          sel_mx;                 // From dwbif0 of aeMB2_dwbif.v
   output [AEMB_XWB-1:2] xwb_adr_o;             // From xslif0 of aeMB2_xslif.v
   output [AEMB_XWB-1:2] xwb_adr_o;             // From xslif0 of aeMB2_xslif.v
   output               xwb_cyc_o;              // From xslif0 of aeMB2_xslif.v
   output               xwb_cyc_o;              // From xslif0 of aeMB2_xslif.v
   output [31:0] xwb_dat_o;              // From xslif0 of aeMB2_xslif.v
   output [31:0] xwb_dat_o;              // From xslif0 of aeMB2_xslif.v
   output               xwb_fb;                 // From xslif0 of aeMB2_xslif.v
   output               xwb_fb;                 // From xslif0 of aeMB2_xslif.v
Line 129... Line 130...
      .dwb_wre_o                        (dwb_wre_o),
      .dwb_wre_o                        (dwb_wre_o),
      .dwb_dat_o                        (dwb_dat_o[31:0]),
      .dwb_dat_o                        (dwb_dat_o[31:0]),
      .dwb_fb                           (dwb_fb),
      .dwb_fb                           (dwb_fb),
      .sel_mx                           (sel_mx[3:0]),
      .sel_mx                           (sel_mx[3:0]),
      .dwb_mx                           (dwb_mx[31:0]),
      .dwb_mx                           (dwb_mx[31:0]),
 
      .exc_dwb                          (exc_dwb[1:0]),
      // Inputs
      // Inputs
      .dwb_dat_i                        (dwb_dat_i[31:0]),
      .dwb_dat_i                        (dwb_dat_i[31:0]),
      .dwb_ack_i                        (dwb_ack_i),
      .dwb_ack_i                        (dwb_ack_i),
      .imm_of                           (imm_of[15:0]),
      .imm_of                           (imm_of[15:0]),
      .opd_of                           (opd_of[31:0]),
      .opd_of                           (opd_of[31:0]),

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