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[/] [aemb/] [trunk/] [rtl/] [verilog/] [aeMB2_mult.v] - Diff between revs 131 and 134
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/* $Id: aeMB2_mult.v,v 1.3 2008-04-26 01:09:06 sybreon Exp $
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/* $Id: aeMB2_mult.v,v 1.4 2008-04-26 17:57:43 sybreon Exp $
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**
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**
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** AEMB2 EDK 6.2 COMPATIBLE CORE
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** AEMB2 EDK 6.2 COMPATIBLE CORE
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** Copyright (C) 2004-2008 Shawn Tan <shawn.tan@aeste.net>
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** Copyright (C) 2004-2008 Shawn Tan <shawn.tan@aeste.net>
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**
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**
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** This file is part of AEMB.
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** This file is part of AEMB.
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dena,
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dena,
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gpha;
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gpha;
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/*AUTOREG*/
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/*AUTOREG*/
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reg [31:0] rOPA, rOPB;
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reg [31:0] rMUL0,
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reg [31:0] rMUL0,
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rMUL1;
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rMUL1;
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always @(posedge gclk)
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always @(posedge gclk)
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if (grst) begin
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if (grst) begin
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/*AUTORESET*/
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/*AUTORESET*/
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// Beginning of autoreset for uninitialized flops
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// Beginning of autoreset for uninitialized flops
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rMUL0 <= 32'h0;
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rMUL0 <= 32'h0;
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rMUL1 <= 32'h0;
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rMUL1 <= 32'h0;
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rOPA <= 32'h0;
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rOPB <= 32'h0;
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// End of automatics
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// End of automatics
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end else if (dena) begin
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end else if (dena) begin
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rMUL1 <= #1 rMUL0;
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//rMUL1 <= #1 rMUL0;
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rMUL0 <= #1 (AEMB_MUL[0]) ? (opa_of * opb_of) : 32'hX;
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rMUL1 <= #1 rMUL0; //rOPA * rOPB;
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rMUL0 <= #1 (opa_of * opb_of);
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rOPA <= #1 opa_of;
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rOPB <= #1 opb_of;
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end
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end
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assign mul_mx = rMUL1;
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assign mul_mx = rMUL1;
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endmodule // aeMB2_mult
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endmodule // aeMB2_mult
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/*
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/*
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$Log: not supported by cvs2svn $
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$Log: not supported by cvs2svn $
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Revision 1.3 2008/04/26 01:09:06 sybreon
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Passes basic tests. Minor documentation changes to make it compatible with iverilog pre-processor.
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Revision 1.2 2008/04/20 16:34:32 sybreon
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Revision 1.2 2008/04/20 16:34:32 sybreon
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Basic version with some features left out.
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Basic version with some features left out.
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Revision 1.1 2008/04/18 00:21:52 sybreon
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Revision 1.1 2008/04/18 00:21:52 sybreon
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Initial import.
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Initial import.
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