OpenCores
URL https://opencores.org/ocsvn/aemb/aemb/trunk

Subversion Repositories aemb

[/] [aemb/] [trunk/] [sim/] [iversim] - Diff between revs 52 and 73

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 52 Rev 73
Line 1... Line 1...
#!/bin/sh
#!/bin/sh
# $Id: iversim,v 1.3 2007-11-09 20:50:51 sybreon Exp $
# $Id: iversim,v 1.4 2007-11-30 17:08:30 sybreon Exp $
# $Log: not supported by cvs2svn $
# $Log: not supported by cvs2svn $
 
# Revision 1.3  2007/11/09 20:50:51  sybreon
 
# Added log output to iverilog.log
 
#
# Revision 1.2  2007/11/05 10:59:31  sybreon
# Revision 1.2  2007/11/05 10:59:31  sybreon
# Added random seed for simulation.
# Added random seed for simulation.
#
#
# Revision 1.1  2007/03/09 17:41:55  sybreon
# Revision 1.1  2007/03/09 17:41:55  sybreon
# initial import
# initial import
#
#
RANDOM=$(date +%s)
RANDOM=$(date +%s)
echo "parameter randseed = $RANDOM;" > random.v
echo "parameter randseed = $RANDOM;" > random.v
iverilog $@ ../rtl/verilog/*.v && vvp -l iverilog.log a.out && rm a.out
iverilog $@ -DAEMB_SIMULATION_KERNEL ../rtl/verilog/*.v && vvp -l iverilog.log a.out && rm a.out
iverilog $@ -DAEMB_SIMULATION_KERNEL ../rtl/verilog/*.v && vvp -l iverilog.log a.out && rm a.out
iverilog $@ -DAEMB_SIMULATION_KERNEL ../rtl/verilog/*.v && vvp -l iverilog.log a.out && rm a.out

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.