| Line 1... |
Line 1... |
// $Id: edk32.v,v 1.2 2007-11-02 19:16:10 sybreon Exp $
|
// $Id: edk32.v,v 1.3 2007-11-05 10:59:31 sybreon Exp $
|
//
|
//
|
// AEMB EDK 3.2 Compatible Core TEST
|
// AEMB EDK 3.2 Compatible Core TEST
|
//
|
//
|
// Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@aeste.net>
|
// Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@aeste.net>
|
//
|
//
|
| Line 18... |
Line 18... |
// License along with this library; if not, write to the Free Software
|
// License along with this library; if not, write to the Free Software
|
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
|
// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
|
// USA
|
// USA
|
//
|
//
|
// $Log: not supported by cvs2svn $
|
// $Log: not supported by cvs2svn $
|
|
// Revision 1.2 2007/11/02 19:16:10 sybreon
|
|
// Added interrupt simulation.
|
|
// Changed "human readable" simulation output.
|
|
//
|
// Revision 1.1 2007/11/02 03:25:45 sybreon
|
// Revision 1.1 2007/11/02 03:25:45 sybreon
|
// New EDK 3.2 compatible design with optional barrel-shifter and multiplier.
|
// New EDK 3.2 compatible design with optional barrel-shifter and multiplier.
|
// Fixed various minor data hazard bugs.
|
// Fixed various minor data hazard bugs.
|
// Code compatible with -O0/1/2/3/s generated code.
|
// Code compatible with -O0/1/2/3/s generated code.
|
//
|
//
|
|
|
module edk32 ();
|
module edk32 ();
|
|
|
|
`include "random.v"
|
|
|
// INITIAL SETUP //////////////////////////////////////////////////////
|
// INITIAL SETUP //////////////////////////////////////////////////////
|
|
|
reg sys_clk_i, sys_rst_i, sys_int_i, sys_exc_i;
|
reg sys_clk_i, sys_rst_i, sys_int_i, sys_exc_i;
|
reg svc;
|
reg svc;
|
integer inttime;
|
integer inttime;
|
|
integer seed;
|
|
|
always #5 sys_clk_i = ~sys_clk_i;
|
always #5 sys_clk_i = ~sys_clk_i;
|
|
|
initial begin
|
initial begin
|
//$dumpfile("dump.vcd");
|
//$dumpfile("dump.vcd");
|
//$dumpvars(1,dut);
|
//$dumpvars(1,dut);
|
end
|
end
|
|
|
initial begin
|
initial begin
|
|
seed = randseed;
|
svc = 0;
|
svc = 0;
|
sys_clk_i = 1;
|
sys_clk_i = $random(seed);
|
sys_rst_i = 1;
|
sys_rst_i = 1;
|
sys_int_i = 0;
|
sys_int_i = 0;
|
sys_exc_i = 0;
|
sys_exc_i = 0;
|
#30 sys_rst_i = 0;
|
#30 sys_rst_i = 0;
|
end
|
end
|
