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[/] [aemb/] [trunk/] [sim/] [verilog/] [edk32.v] - Diff between revs 73 and 79

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// $Id: edk32.v,v 1.10 2007-11-30 17:08:30 sybreon Exp $
// $Id: edk32.v,v 1.11 2007-12-11 00:44:31 sybreon Exp $
//
//
// AEMB EDK 3.2 Compatible Core TEST
// AEMB EDK 3.2 Compatible Core TEST
//
//
// Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@aeste.net>
// Copyright (C) 2004-2007 Shawn Tan Ser Ngiap <shawn.tan@aeste.net>
//  
//  
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//
//
// You should have received a copy of the GNU Lesser General Public
// You should have received a copy of the GNU Lesser General Public
// License along with AEMB. If not, see <http://www.gnu.org/licenses/>.
// License along with AEMB. If not, see <http://www.gnu.org/licenses/>.
//
//
// $Log: not supported by cvs2svn $
// $Log: not supported by cvs2svn $
 
// Revision 1.10  2007/11/30 17:08:30  sybreon
 
// Moved simulation kernel into code.
 
//
// Revision 1.9  2007/11/20 18:36:00  sybreon
// Revision 1.9  2007/11/20 18:36:00  sybreon
// Removed unnecessary byte acrobatics with VMEM data.
// Removed unnecessary byte acrobatics with VMEM data.
//
//
// Revision 1.8  2007/11/18 19:41:45  sybreon
// Revision 1.8  2007/11/18 19:41:45  sybreon
// Minor simulation fixes.
// Minor simulation fixes.
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// New EDK 3.2 compatible design with optional barrel-shifter and multiplier.
// New EDK 3.2 compatible design with optional barrel-shifter and multiplier.
// Fixed various minor data hazard bugs.
// Fixed various minor data hazard bugs.
// Code compatible with -O0/1/2/3/s generated code.
// Code compatible with -O0/1/2/3/s generated code.
//
//
 
 
 
`define AEMB_SIMULATION_KERNEL
 
 
module edk32 ();
module edk32 ();
 
 
`include "random.v"
`include "random.v"
 
 
   // INITIAL SETUP //////////////////////////////////////////////////////
   // INITIAL SETUP //////////////////////////////////////////////////////
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   integer i;
   integer i;
   initial begin
   initial begin
      for (i=0;i<65535;i=i+1) begin
      for (i=0;i<65535;i=i+1) begin
         ram[i] <= $random;
         ram[i] <= $random;
      end
      end
      #1 $readmemh("dump.rom",ram);
      #1 $readmemh("dump.vmem",ram);
   end
   end
 
 
   // DISPLAY OUTPUTS ///////////////////////////////////////////////////
   // DISPLAY OUTPUTS ///////////////////////////////////////////////////
 
 
   integer rnd;
   integer rnd;

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