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https://opencores.org/ocsvn/aemb/aemb/trunk
[/] [aemb/] [trunk/] [sw/] [cc/] [corefunc.hh] - Diff between revs 191 and 206
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Rev 206 |
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Line 27... |
*/
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*/
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#ifndef COREFUNC_HH
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#ifndef COREFUNC_HH
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#define COREFUNC_HH
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#define COREFUNC_HH
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#define MAGIC 0xAE62AE62 // magic number
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define MAGIC 0xAE63AE63 // magic number
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volatile int exce = 0;
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void exceptionHandler()
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{
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exce++; // flag the exception service routine
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}
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volatile void _hw_exception_handler()
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{
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//exceptionHandler();
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exce++;
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asm volatile (//"lwi r15,r1,0\n"
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"rted r17, 0\n"
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"nop\n");
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//"addik r1,r1,28\n");
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}
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/**
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EXCEPTION TEST ROUTINE
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*/
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int exceptionTest(int timeout)
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{
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volatile int *toggle = (int *)0xFFFFFFE2;
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// enable exceptions
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asm volatile (".long 0xDEADC0DE"); // define illegal instruction (1 error)
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*toggle = *toggle; // test unaligned memory access (2 errors)
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// disable exceptions
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return (exce != 3) ? EXIT_FAILURE : EXIT_SUCCESS;
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}
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volatile int intr = 0;
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volatile int intr = 0;
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void __attribute__ ((interrupt_handler)) interruptHandler()
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void __attribute__ ((interrupt_handler)) interruptHandler()
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{
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{
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magic = *(int *)alloc; // read from memory
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magic = *(int *)alloc; // read from memory
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return (magic == MAGIC) ? EXIT_SUCCESS : EXIT_FAILURE;
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return (magic == MAGIC) ? EXIT_SUCCESS : EXIT_FAILURE;
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}
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}
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#ifdef __cplusplus
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}
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#endif
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#endif
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/*
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#endif
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$Log: not supported by cvs2svn $
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Revision 1.3 2008/05/01 08:37:37 sybreon
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Added interrupt capability.
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Revision 1.2 2008/04/28 20:30:24 sybreon
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Changed to new headers.
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Revision 1.1 2008/04/27 16:04:42 sybreon
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Minor cosmetic changes.
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*/
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