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https://opencores.org/ocsvn/ahb_master/ahb_master/trunk
[/] [ahb_master/] [trunk/] [src/] [base/] [ic_registry_resp.v] - Diff between revs 10 and 11
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| Rev 10 |
Rev 11 |
| Line 70... |
Line 70... |
reg SSX_OK;
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reg SSX_OK;
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assign Amatch_MMX_IDGROUP_MMX_ID.IDX = MMX_AID == ID_BITS'GROUP_MMX_ID;
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assign Amatch_MMX_IDGROUP_MMX_ID.IDX = MMX_AID == ID_BITS'bADD_IDGROUP_MMX_ID;
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assign match_SSX_MMX_IDGROUP_MMX_ID.IDX = SSX_ID == ID_BITS'GROUP_MMX_ID;
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assign match_SSX_MMX_IDGROUP_MMX_ID.IDX = SSX_ID == ID_BITS'bADD_IDGROUP_MMX_ID;
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assign cmd_push_MMX = MMX_AVALID & MMX_AREADY;
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assign cmd_push_MMX = MMX_AVALID & MMX_AREADY;
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assign cmd_push_MMX_IDGROUP_MMX_ID.IDX = cmd_push_MMX & Amatch_MMX_IDGROUP_MMX_ID.IDX;
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assign cmd_push_MMX_IDGROUP_MMX_ID.IDX = cmd_push_MMX & Amatch_MMX_IDGROUP_MMX_ID.IDX;
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assign cmd_pop_SSX = SSX_VALID & SSX_READY & SSX_LAST;
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assign cmd_pop_SSX = SSX_VALID & SSX_READY & SSX_LAST;
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| Line 105... |
Line 105... |
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LOOP SX
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LOOP SX
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always @(*)
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always @(*)
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begin
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begin
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case (SSX_ID)
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case (SSX_ID)
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ID_BITS'GROUP_MMX_ID : SSX_MSTR = MSTR_BITS'dMX;
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ID_BITS'bADD_IDGROUP_MMX_ID : SSX_MSTR = MSTR_BITS'dMX;
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default : SSX_MSTR = ERR_MSTR;
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default : SSX_MSTR = ERR_MSTR;
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endcase
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endcase
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end
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end
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always @(*)
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always @(*)
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begin
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begin
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case (SSX_ID)
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case (SSX_ID)
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ID_BITS'GROUP_MMX_ID : SSX_OK = slave_out_MMX_IDGROUP_MMX_ID.IDX == SLV_BITS'dSX;
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ID_BITS'bADD_IDGROUP_MMX_ID : SSX_OK = slave_out_MMX_IDGROUP_MMX_ID.IDX == SLV_BITS'dSX;
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default : SSX_OK = 1'b1; //SLVERR
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default : SSX_OK = 1'b1; //SLVERR
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endcase
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endcase
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end
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end
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ENDLOOP SX
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ENDLOOP SX
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