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//==================================================================
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//==================================================================//
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// File: d_MouseDriver.v
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// File: d_MouseDriver.v //
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// Version: 0.01
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// Version: 0.0.0.1 //
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -//
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// Copyright Stephen Pickett
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// Copyright (C) Stephen Pickett //
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// April 28, 2005
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// Apr 28, 2005 //
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//------------------------------------------------------------------
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// //
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// Revisions:
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// This program is free software; you can redistribute it and/or //
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// Ver 0.01 Apr 28, 2005 Initial Release
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// modify it under the terms of the GNU General Public License //
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//
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// as published by the Free Software Foundation; either version 2 //
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//==================================================================
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// of the License, or (at your option) any later version. //
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// //
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// This program is distributed in the hope that it will be useful, //
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// but WITHOUT ANY WARRANTY; without even the implied warranty of //
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the //
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// GNU General Public License for more details. //
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// //
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// If you have not received a copy of the GNU General Public License//
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// along with this program; write to: //
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// Free Software Foundation, Inc., //
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// 51 Franklin Street, Fifth Floor, //
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// Boston, MA 02110-1301, USA. //
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// //
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//------------------------------------------------------------------//
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// Revisions: //
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// Ver 0.0.0.1 Apr 28, 2005 Under Development //
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// //
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//==================================================================//
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module Driver_mouse(
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module Driver_mouse(
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CLK_50MHZ, MASTER_RST,
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CLK_50MHZ, MASTER_RST,
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PS2C, PS2D,
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PS2C, PS2D,
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XCOORD, YCOORD,
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XCOORD, YCOORD,
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reg CLK_ps2c_debounced;
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reg CLK_ps2c_debounced;
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// Debounce the PS2C line.
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// Debounce the PS2C line.
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// The mouse is generally not outputting a nice rising clock edge.
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// The mouse is generally not outputting a nice rising clock edge.
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// To eliminate the false edge detection, make sure it is high/low
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// To eliminate the false edge detection, make sure it is high/low
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// for at least 256 counts before triggering the CLK.
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// for at least 256 counts (5.12us off 50MHz) before triggering the CLK.
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always @ (posedge CLK_50MHZ or posedge MASTER_RST) begin
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always @ (posedge CLK_50MHZ or posedge MASTER_RST) begin
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if(MASTER_RST == 1'b1) begin
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if(MASTER_RST == 1'b1) begin
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Counter_PS2C <= 8'b0;
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Counter_PS2C <= 8'b0;
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end else begin
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end else begin
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if(PS2C == 1'b1) begin
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if(PS2C == 1'b1) begin
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if(XCOORD <= xcoord_buf)
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if(XCOORD <= xcoord_buf)
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XCOORD <= 12'b0;
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XCOORD <= 12'b0;
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else
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else
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XCOORD <= XCOORD - xcoord_buf;
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XCOORD <= XCOORD - xcoord_buf;
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end else begin // POSITIVE
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end else begin // POSITIVE
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if((XCOORD + xcoord_buf) >= 11'd639)
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if((XCOORD + xcoord_buf) >= 12'd639)
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XCOORD <= 12'd639;
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XCOORD <= 12'd639;
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else
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else
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XCOORD <= XCOORD + xcoord_buf;
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XCOORD <= XCOORD + xcoord_buf;
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end
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end
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end else begin
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end else begin
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always @ (posedge CLK_ps2c_debounced or posedge MASTER_RST) begin
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always @ (posedge CLK_ps2c_debounced or posedge MASTER_RST) begin
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if(MASTER_RST == 1'b1) begin
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if(MASTER_RST == 1'b1) begin
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YCOORD <= 12'd199;
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YCOORD <= 12'd199;
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end else if(Counter_bits == 6'd32 && (data_in_buf[8] == 1'b0)) begin
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end else if(Counter_bits == 6'd32 && (data_in_buf[8] == 1'b0)) begin
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if(data_in_buf[6] == 1'b0) begin
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if(data_in_buf[6] == 1'b0) begin
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if((YCOORD + ycoord_buf) >= 11'd479)
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if( (YCOORD < 12'd401) && ((YCOORD + ycoord_buf) >= 12'd401) )
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YCOORD <= 12'd479;
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YCOORD <= 12'd400;
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else if( ((YCOORD >= 12'd441) /*&& (YCOORD <= 12'd520)*/) && ((YCOORD + ycoord_buf) > 12'd520) )
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YCOORD <= (YCOORD + ycoord_buf) - 12'd521;
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else
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else
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YCOORD <= YCOORD + ycoord_buf;
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YCOORD <= YCOORD + ycoord_buf;
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end else begin
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end else begin
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if(YCOORD <= ycoord_buf)
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if( /*(YCOORD < 12'd401) &&*/ (YCOORD < ycoord_buf) )
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YCOORD <= 12'd0;
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YCOORD <= 12'd521 - ycoord_buf;
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else if( (YCOORD >= 12'd441) && ((YCOORD-12'd441) < ycoord_buf) )
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YCOORD <= 12'd441;
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else
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else
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YCOORD <= YCOORD - ycoord_buf;
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YCOORD <= YCOORD - ycoord_buf;
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end
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end
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end else begin
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end else begin
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YCOORD <= YCOORD;
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YCOORD <= YCOORD;
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