OpenCores
URL https://opencores.org/ocsvn/amber/amber/trunk

Subversion Repositories amber

[/] [amber/] [trunk/] [hw/] [fpga/] [bin/] [xs6_source_files.prj] - Diff between revs 23 and 35

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 23 Rev 35
Line 48... Line 48...
verilog work ../../vlog/system/wb_xs6_ddr3_bridge.v
verilog work ../../vlog/system/wb_xs6_ddr3_bridge.v
verilog work ../../vlog/system/wb_xv6_ddr3_bridge.v
verilog work ../../vlog/system/wb_xv6_ddr3_bridge.v
verilog work ../../vlog/system/wishbone_arbiter.v
verilog work ../../vlog/system/wishbone_arbiter.v
verilog work ../../vlog/system/afifo.v
verilog work ../../vlog/system/afifo.v
verilog work ../../vlog/system/ddr3_afifo.v
verilog work ../../vlog/system/ddr3_afifo.v
 
verilog work ../../vlog/system/ethmac_wb.v
 
 
# EthMac
# EthMac
verilog work ../../vlog/ethmac/eth_clockgen.v
verilog work ../../vlog/ethmac/eth_clockgen.v
verilog work ../../vlog/ethmac/eth_crc.v
verilog work ../../vlog/ethmac/eth_crc.v
verilog work ../../vlog/ethmac/eth_fifo.v
verilog work ../../vlog/ethmac/eth_fifo.v
Line 91... Line 92...
verilog work ../../vlog/amber23/a23_wishbone.v
verilog work ../../vlog/amber23/a23_wishbone.v
 
 
# Amber 25
# Amber 25
verilog work ../../vlog/amber25/a25_alu.v
verilog work ../../vlog/amber25/a25_alu.v
verilog work ../../vlog/amber25/a25_barrel_shift.v
verilog work ../../vlog/amber25/a25_barrel_shift.v
 
verilog work ../../vlog/amber25/a25_shifter.v
verilog work ../../vlog/amber25/a25_coprocessor.v
verilog work ../../vlog/amber25/a25_coprocessor.v
verilog work ../../vlog/amber25/a25_core.v
verilog work ../../vlog/amber25/a25_core.v
verilog work ../../vlog/amber25/a25_dcache.v
verilog work ../../vlog/amber25/a25_dcache.v
verilog work ../../vlog/amber25/a25_decode.v
verilog work ../../vlog/amber25/a25_decode.v
verilog work ../../vlog/amber25/a25_execute.v
verilog work ../../vlog/amber25/a25_execute.v
Line 102... Line 104...
verilog work ../../vlog/amber25/a25_icache.v
verilog work ../../vlog/amber25/a25_icache.v
verilog work ../../vlog/amber25/a25_mem.v
verilog work ../../vlog/amber25/a25_mem.v
verilog work ../../vlog/amber25/a25_multiply.v
verilog work ../../vlog/amber25/a25_multiply.v
verilog work ../../vlog/amber25/a25_register_bank.v
verilog work ../../vlog/amber25/a25_register_bank.v
verilog work ../../vlog/amber25/a25_wishbone.v
verilog work ../../vlog/amber25/a25_wishbone.v
 
verilog work ../../vlog/amber25/a25_wishbone_buf.v
verilog work ../../vlog/amber25/a25_write_back.v
verilog work ../../vlog/amber25/a25_write_back.v
 
 
# Xilinx Spartan-6 FPGA Hardware wrappers
# Xilinx Spartan-6 FPGA Hardware wrappers
verilog work ../../vlog/lib/xs6_addsub_n.v
verilog work ../../vlog/lib/xs6_addsub_n.v
verilog work ../../vlog/lib/xs6_sram_2048x32_byte_en.v
verilog work ../../vlog/lib/xs6_sram_2048x32_byte_en.v

powered by: WebSVN 2.1.0

© copyright 1999-2025 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.