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https://opencores.org/ocsvn/amber/amber/trunk
[/] [amber/] [trunk/] [hw/] [tests/] [ldm5.S] - Diff between revs 86 and 87
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| Rev 86 |
Rev 87 |
| Line 46... |
Line 46... |
mov r14, #100
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mov r14, #100
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ldr r13, Data1Base
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ldr r13, Data1Base
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ldmia r13!,{r1-r14}^ // load into user mode registers
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ldmia r13!,{r1-r14}^ // load into user mode registers
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// supervisor r14 value should be unchanged
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// supervisor r14 value should be unchanged
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//nop
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//nop
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mov r0, r14
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mov r0, r14
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cmp r0, #100
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cmp r0, #100
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bne testfail
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// same test again, using r13 instead of r14
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mov r13, #100
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ldr r14, Data1Base
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ldmia r14!,{r1-r13}^ // load into user mode registers
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mov r0, r13
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cmp r0, #100
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ldr r1, Data14Base
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cmp r1, r14
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bne testfail
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beq testpass
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beq testpass
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testfail:
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testfail:
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ldr r11, AdrTestStatus
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ldr r11, AdrTestStatus
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str r10, [r11]
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str r10, [r11]
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| Line 67... |
Line 77... |
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/* Write 17 to this address to generate a Test Passed message */
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/* Write 17 to this address to generate a Test Passed message */
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AdrTestStatus: .word ADR_AMBER_TEST_STATUS
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AdrTestStatus: .word ADR_AMBER_TEST_STATUS
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Data1Base: .word Data1
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Data1Base: .word Data1
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Data14Base: .word Data14
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Data1: .word 0x00
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Data1: .word 0x00
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.word 0x01
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.word 0x01
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.word 0x02
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.word 0x02
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.word 0x03
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.word 0x03
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.word 0x04
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.word 0x04
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| Line 80... |
Line 91... |
.word 0x08
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.word 0x08
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.word 0x09
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.word 0x09
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.word 0x0a
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.word 0x0a
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.word 0x0b
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.word 0x0b
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.word 0x0c
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.word 0x0c
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.word 0x0d
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Data14: .word 0x0d
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.word 0x0e
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.word 0x0e
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.word 0x0f
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.word 0x0f
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.word 0x10
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.word 0x10
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/* ========================================================================= */
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/* ========================================================================= */
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