| Line 98... |
Line 98... |
wire [4:0] read_data_alignment;
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wire [4:0] read_data_alignment;
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wire [3:0] rm_sel;
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wire [3:0] rm_sel;
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wire [3:0] rds_sel;
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wire [3:0] rds_sel;
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wire [3:0] rn_sel;
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wire [3:0] rn_sel;
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wire [3:0] rm_sel_nxt;
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wire [3:0] rds_sel_nxt;
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wire [3:0] rn_sel_nxt;
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wire [1:0] barrel_shift_amount_sel;
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wire [1:0] barrel_shift_amount_sel;
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wire [1:0] barrel_shift_data_sel;
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wire [1:0] barrel_shift_data_sel;
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wire [1:0] barrel_shift_function;
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wire [1:0] barrel_shift_function;
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wire [8:0] alu_function;
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wire [8:0] alu_function;
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wire [1:0] multiply_function;
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wire [1:0] multiply_function;
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| Line 118... |
Line 121... |
wire write_data_wen;
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wire write_data_wen;
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wire copro_write_data_wen;
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wire copro_write_data_wen;
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wire base_address_wen;
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wire base_address_wen;
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wire pc_wen;
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wire pc_wen;
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wire [14:0] reg_bank_wen;
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wire [14:0] reg_bank_wen;
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wire [3:0] reg_bank_wsel;
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|
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wire [2:0] copro_opcode1;
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wire [2:0] copro_opcode1;
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wire [2:0] copro_opcode2;
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wire [2:0] copro_opcode2;
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wire [3:0] copro_crn;
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wire [3:0] copro_crn;
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wire [3:0] copro_crm;
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wire [3:0] copro_crm;
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| Line 214... |
Line 218... |
.o_exclusive_exec ( exclusive_exec ),
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.o_exclusive_exec ( exclusive_exec ),
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.o_data_access_exec ( data_access_exec ),
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.o_data_access_exec ( data_access_exec ),
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.o_rm_sel ( rm_sel ),
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.o_rm_sel ( rm_sel ),
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.o_rds_sel ( rds_sel ),
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.o_rds_sel ( rds_sel ),
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.o_rn_sel ( rn_sel ),
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.o_rn_sel ( rn_sel ),
|
|
.o_rm_sel_nxt ( rm_sel_nxt ),
|
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.o_rds_sel_nxt ( rds_sel_nxt ),
|
|
.o_rn_sel_nxt ( rn_sel_nxt ),
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.o_barrel_shift_amount_sel ( barrel_shift_amount_sel ),
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.o_barrel_shift_amount_sel ( barrel_shift_amount_sel ),
|
.o_barrel_shift_data_sel ( barrel_shift_data_sel ),
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.o_barrel_shift_data_sel ( barrel_shift_data_sel ),
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.o_barrel_shift_function ( barrel_shift_function ),
|
.o_barrel_shift_function ( barrel_shift_function ),
|
.o_alu_function ( alu_function ),
|
.o_alu_function ( alu_function ),
|
.o_multiply_function ( multiply_function ),
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.o_multiply_function ( multiply_function ),
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| Line 232... |
Line 239... |
.o_firq_not_user_mode ( firq_not_user_mode ),
|
.o_firq_not_user_mode ( firq_not_user_mode ),
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.o_write_data_wen ( write_data_wen ),
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.o_write_data_wen ( write_data_wen ),
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.o_base_address_wen ( base_address_wen ),
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.o_base_address_wen ( base_address_wen ),
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.o_pc_wen ( pc_wen ),
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.o_pc_wen ( pc_wen ),
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.o_reg_bank_wen ( reg_bank_wen ),
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.o_reg_bank_wen ( reg_bank_wen ),
|
|
.o_reg_bank_wsel ( reg_bank_wsel ),
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.o_status_bits_flags_wen ( status_bits_flags_wen ),
|
.o_status_bits_flags_wen ( status_bits_flags_wen ),
|
.o_status_bits_mode_wen ( status_bits_mode_wen ),
|
.o_status_bits_mode_wen ( status_bits_mode_wen ),
|
.o_status_bits_irq_mask_wen ( status_bits_irq_mask_wen ),
|
.o_status_bits_irq_mask_wen ( status_bits_irq_mask_wen ),
|
.o_status_bits_firq_mask_wen ( status_bits_firq_mask_wen ),
|
.o_status_bits_firq_mask_wen ( status_bits_firq_mask_wen ),
|
|
|
| Line 289... |
Line 297... |
.i_exclusive_exec ( exclusive_exec ),
|
.i_exclusive_exec ( exclusive_exec ),
|
.i_data_access_exec ( data_access_exec ),
|
.i_data_access_exec ( data_access_exec ),
|
.i_rm_sel ( rm_sel ),
|
.i_rm_sel ( rm_sel ),
|
.i_rds_sel ( rds_sel ),
|
.i_rds_sel ( rds_sel ),
|
.i_rn_sel ( rn_sel ),
|
.i_rn_sel ( rn_sel ),
|
|
.i_rm_sel_nxt ( rm_sel_nxt ),
|
|
.i_rds_sel_nxt ( rds_sel_nxt ),
|
|
.i_rn_sel_nxt ( rn_sel_nxt ),
|
.i_barrel_shift_amount_sel ( barrel_shift_amount_sel ),
|
.i_barrel_shift_amount_sel ( barrel_shift_amount_sel ),
|
.i_barrel_shift_data_sel ( barrel_shift_data_sel ),
|
.i_barrel_shift_data_sel ( barrel_shift_data_sel ),
|
.i_barrel_shift_function ( barrel_shift_function ),
|
.i_barrel_shift_function ( barrel_shift_function ),
|
.i_alu_function ( alu_function ),
|
.i_alu_function ( alu_function ),
|
.i_multiply_function ( multiply_function ),
|
.i_multiply_function ( multiply_function ),
|
| Line 307... |
Line 318... |
.i_firq_not_user_mode ( firq_not_user_mode ),
|
.i_firq_not_user_mode ( firq_not_user_mode ),
|
.i_write_data_wen ( write_data_wen ),
|
.i_write_data_wen ( write_data_wen ),
|
.i_base_address_wen ( base_address_wen ),
|
.i_base_address_wen ( base_address_wen ),
|
.i_pc_wen ( pc_wen ),
|
.i_pc_wen ( pc_wen ),
|
.i_reg_bank_wen ( reg_bank_wen ),
|
.i_reg_bank_wen ( reg_bank_wen ),
|
|
.i_reg_bank_wsel ( reg_bank_wsel ),
|
.i_status_bits_flags_wen ( status_bits_flags_wen ),
|
.i_status_bits_flags_wen ( status_bits_flags_wen ),
|
.i_status_bits_mode_wen ( status_bits_mode_wen ),
|
.i_status_bits_mode_wen ( status_bits_mode_wen ),
|
.i_status_bits_irq_mask_wen ( status_bits_irq_mask_wen ),
|
.i_status_bits_irq_mask_wen ( status_bits_irq_mask_wen ),
|
.i_status_bits_firq_mask_wen ( status_bits_firq_mask_wen ),
|
.i_status_bits_firq_mask_wen ( status_bits_firq_mask_wen ),
|
.i_copro_write_data_wen ( copro_write_data_wen )
|
.i_copro_write_data_wen ( copro_write_data_wen )
|
