Line 84... |
Line 84... |
output [3:0] o_rn_sel_nxt,
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output [3:0] o_rn_sel_nxt,
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output reg [1:0] o_barrel_shift_amount_sel = 'd0,
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output reg [1:0] o_barrel_shift_amount_sel = 'd0,
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output reg [1:0] o_barrel_shift_data_sel = 'd0,
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output reg [1:0] o_barrel_shift_data_sel = 'd0,
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output reg [1:0] o_barrel_shift_function = 'd0,
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output reg [1:0] o_barrel_shift_function = 'd0,
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output reg [8:0] o_alu_function = 'd0,
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output reg [8:0] o_alu_function = 'd0,
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output reg o_use_carry_in = 'd0,
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output reg [1:0] o_multiply_function = 'd0,
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output reg [1:0] o_multiply_function = 'd0,
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output reg [2:0] o_interrupt_vector_sel = 'd0,
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output reg [2:0] o_interrupt_vector_sel = 'd0,
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output reg [3:0] o_address_sel = 4'd2,
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output reg [3:0] o_address_sel = 4'd2,
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output reg [1:0] o_pc_sel = 2'd2,
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output reg [1:0] o_pc_sel = 2'd2,
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output reg [1:0] o_byte_enable_sel = 'd0, // byte, halfword or word write
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output reg [1:0] o_byte_enable_sel = 'd0, // byte, halfword or word write
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Line 198... |
Line 199... |
reg exclusive_exec_nxt;
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reg exclusive_exec_nxt;
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reg data_access_exec_nxt;
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reg data_access_exec_nxt;
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reg [1:0] barrel_shift_function_nxt;
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reg [1:0] barrel_shift_function_nxt;
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wire [8:0] alu_function_nxt;
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wire [8:0] alu_function_nxt;
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reg use_carry_in_nxt;
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reg [1:0] multiply_function_nxt;
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reg [1:0] multiply_function_nxt;
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reg [1:0] status_bits_mode_nxt;
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reg [1:0] status_bits_mode_nxt;
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reg status_bits_irq_mask_nxt;
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reg status_bits_irq_mask_nxt;
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reg status_bits_firq_mask_nxt;
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reg status_bits_firq_mask_nxt;
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Line 610... |
Line 612... |
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// default Mux Select values
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// default Mux Select values
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barrel_shift_amount_sel_nxt = 'd0; // don't shift the input
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barrel_shift_amount_sel_nxt = 'd0; // don't shift the input
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barrel_shift_data_sel_nxt = 'd0; // immediate value
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barrel_shift_data_sel_nxt = 'd0; // immediate value
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barrel_shift_function_nxt = 'd0;
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barrel_shift_function_nxt = 'd0;
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use_carry_in_nxt = 'd0;
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multiply_function_nxt = 'd0;
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multiply_function_nxt = 'd0;
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address_sel_nxt = 'd0;
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address_sel_nxt = 'd0;
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pc_sel_nxt = 'd0;
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pc_sel_nxt = 'd0;
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byte_enable_sel_nxt = 'd0;
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byte_enable_sel_nxt = 'd0;
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status_bits_sel_nxt = 'd0;
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status_bits_sel_nxt = 'd0;
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Line 679... |
Line 682... |
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if ( opcode == ADC ) // Add with Carry
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if ( opcode == ADC ) // Add with Carry
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begin
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begin
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alu_out_sel_nxt = 4'd1; // Add
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alu_out_sel_nxt = 4'd1; // Add
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alu_cin_sel_nxt = 2'd2; // carry in from status_bits
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alu_cin_sel_nxt = 2'd2; // carry in from status_bits
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use_carry_in_nxt = 1'd1;
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end
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end
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if ( opcode == SUB || opcode == CMP ) // Subtract
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if ( opcode == SUB || opcode == CMP ) // Subtract
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begin
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begin
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alu_out_sel_nxt = 4'd1; // Add
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alu_out_sel_nxt = 4'd1; // Add
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Line 697... |
Line 701... |
if ( opcode == SBC ) // Subtract with Carry
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if ( opcode == SBC ) // Subtract with Carry
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begin
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begin
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alu_out_sel_nxt = 4'd1; // Add
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alu_out_sel_nxt = 4'd1; // Add
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alu_cin_sel_nxt = 2'd2; // carry in from status_bits
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alu_cin_sel_nxt = 2'd2; // carry in from status_bits
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alu_not_sel_nxt = 1'd1; // invert B
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alu_not_sel_nxt = 1'd1; // invert B
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use_carry_in_nxt = 1'd1;
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end
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end
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if ( opcode == RSB ) // Reverse Subtract
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if ( opcode == RSB ) // Reverse Subtract
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begin
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begin
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alu_out_sel_nxt = 4'd1; // Add
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alu_out_sel_nxt = 4'd1; // Add
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Line 713... |
Line 718... |
begin
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begin
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alu_out_sel_nxt = 4'd1; // Add
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alu_out_sel_nxt = 4'd1; // Add
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alu_cin_sel_nxt = 2'd2; // carry in from status_bits
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alu_cin_sel_nxt = 2'd2; // carry in from status_bits
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alu_not_sel_nxt = 1'd1; // invert B
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alu_not_sel_nxt = 1'd1; // invert B
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alu_swap_sel_nxt = 1'd1; // swap A and B
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alu_swap_sel_nxt = 1'd1; // swap A and B
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use_carry_in_nxt = 1'd1;
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end
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end
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if ( opcode == AND || opcode == TST ) // Logical AND, Test (using AND operator)
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if ( opcode == AND || opcode == TST ) // Logical AND, Test (using AND operator)
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begin
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begin
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alu_out_sel_nxt = 4'd8; // AND
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alu_out_sel_nxt = 4'd8; // AND
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Line 1541... |
Line 1547... |
o_rn_sel <= o_rn_sel_nxt;
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o_rn_sel <= o_rn_sel_nxt;
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o_barrel_shift_amount_sel <= barrel_shift_amount_sel_nxt;
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o_barrel_shift_amount_sel <= barrel_shift_amount_sel_nxt;
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o_barrel_shift_data_sel <= barrel_shift_data_sel_nxt;
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o_barrel_shift_data_sel <= barrel_shift_data_sel_nxt;
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o_barrel_shift_function <= barrel_shift_function_nxt;
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o_barrel_shift_function <= barrel_shift_function_nxt;
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o_alu_function <= alu_function_nxt;
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o_alu_function <= alu_function_nxt;
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o_use_carry_in <= use_carry_in_nxt;
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o_multiply_function <= multiply_function_nxt;
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o_multiply_function <= multiply_function_nxt;
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o_interrupt_vector_sel <= next_interrupt;
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o_interrupt_vector_sel <= next_interrupt;
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o_address_sel <= address_sel_nxt;
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o_address_sel <= address_sel_nxt;
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o_pc_sel <= pc_sel_nxt;
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o_pc_sel <= pc_sel_nxt;
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o_byte_enable_sel <= byte_enable_sel_nxt;
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o_byte_enable_sel <= byte_enable_sel_nxt;
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