| Line 84... |
Line 84... |
reg [(5*8)-1:0] xINSTRUCTION_EXECUTE_R = "--- ";
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reg [(5*8)-1:0] xINSTRUCTION_EXECUTE_R = "--- ";
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wire [(8*8)-1:0] TYPE_NAME;
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wire [(8*8)-1:0] TYPE_NAME;
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reg [3:0] fchars;
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reg [3:0] fchars;
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reg [31:0] execute_address = 'd0;
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reg [31:0] execute_address = 'd0;
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reg [2:0] interrupt_d1;
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reg [2:0] interrupt_d1;
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reg [31:0] clk_count = 'd0;
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reg [31:0] execute_instruction = 'd0;
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reg [31:0] execute_instruction = 'd0;
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reg execute_now = 'd0;
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reg execute_now = 'd0;
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reg execute_valid = 'd0;
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reg execute_valid = 'd0;
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reg execute_undefined = 'd0;
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reg execute_undefined = 'd0;
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| Line 251... |
Line 250... |
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always @ ( posedge i_clk )
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always @ ( posedge i_clk )
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xINSTRUCTION_EXECUTE_R <= xINSTRUCTION_EXECUTE;
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xINSTRUCTION_EXECUTE_R <= xINSTRUCTION_EXECUTE;
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always @( posedge i_clk )
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always @( posedge i_clk )
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clk_count <= clk_count + 1'd1;
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always @( posedge i_clk )
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if ( execute_now )
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if ( execute_now )
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begin
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begin
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// Interrupts override instructions that are just starting
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// Interrupts override instructions that are just starting
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if ( interrupt_d1 == 3'd0 || interrupt_d1 == 3'd7 )
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if ( interrupt_d1 == 3'd0 || interrupt_d1 == 3'd7 )
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begin
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begin
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$fwrite(decompile_file,"%09d ", clk_count);
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$fwrite(decompile_file,"%09d ", `U_TB.clk_count);
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// Right justify the address
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// Right justify the address
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if ( execute_address < 32'h10) $fwrite(decompile_file," %01x: ", {execute_address[ 3:1], 1'd0});
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if ( execute_address < 32'h10) $fwrite(decompile_file," %01x: ", {execute_address[ 3:1], 1'd0});
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else if ( execute_address < 32'h100) $fwrite(decompile_file," %02x: ", {execute_address[ 7:1], 1'd0});
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else if ( execute_address < 32'h100) $fwrite(decompile_file," %02x: ", {execute_address[ 7:1], 1'd0});
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else if ( execute_address < 32'h1000) $fwrite(decompile_file," %03x: ", {execute_address[11:1], 1'd0});
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else if ( execute_address < 32'h1000) $fwrite(decompile_file," %03x: ", {execute_address[11:1], 1'd0});
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| Line 278... |
Line 274... |
// condition field in execute stage allows instruction to execute ?
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// condition field in execute stage allows instruction to execute ?
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if (!i_instruction_execute)
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if (!i_instruction_execute)
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begin
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begin
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$fwrite(decompile_file,"-");
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$fwrite(decompile_file,"-");
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if ( type == SWI )
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if ( type == SWI )
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$display ("Cycle %09d SWI not taken *************", clk_count);
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$display ("Cycle %09d SWI not taken *************", `U_TB.clk_count);
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end
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end
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else
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else
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$fwrite(decompile_file," ");
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$fwrite(decompile_file," ");
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// ========================================
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// ========================================
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| Line 367... |
Line 363... |
end
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end
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// Undefined Instruction Interrupts
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// Undefined Instruction Interrupts
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if ( i_instruction_execute && execute_undefined )
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if ( i_instruction_execute && execute_undefined )
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begin
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begin
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$fwrite( decompile_file,"%09d interrupt undefined instruction", clk_count );
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$fwrite( decompile_file,"%09d interrupt undefined instruction", `U_TB.clk_count );
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$fwrite( decompile_file,", return addr " );
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$fwrite( decompile_file,", return addr " );
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$fwrite( decompile_file,"%08x\n", pcf(get_reg_val(5'd21)-4'd4) );
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$fwrite( decompile_file,"%08x\n", pcf(get_reg_val(5'd21)-4'd4) );
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end
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end
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// Software Interrupt
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// Software Interrupt
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if ( i_instruction_execute && type == SWI )
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if ( i_instruction_execute && type == SWI )
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begin
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begin
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$fwrite( decompile_file,"%09d interrupt swi", clk_count );
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$fwrite( decompile_file,"%09d interrupt swi", `U_TB.clk_count );
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$fwrite( decompile_file,", return addr " );
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$fwrite( decompile_file,", return addr " );
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$fwrite( decompile_file,"%08x\n", pcf(get_reg_val(5'd21)-4'd4) );
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$fwrite( decompile_file,"%08x\n", pcf(get_reg_val(5'd21)-4'd4) );
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end
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end
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end
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end
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| Line 390... |
Line 386... |
interrupt_d1 <= i_interrupt;
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interrupt_d1 <= i_interrupt;
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// Asynchronous Interrupts
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// Asynchronous Interrupts
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if ( interrupt_d1 != 3'd0 && i_interrupt_state )
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if ( interrupt_d1 != 3'd0 && i_interrupt_state )
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begin
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begin
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$fwrite( decompile_file,"%09d interrupt ", clk_count );
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$fwrite( decompile_file,"%09d interrupt ", `U_TB.clk_count );
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case ( interrupt_d1 )
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case ( interrupt_d1 )
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3'd1: $fwrite( decompile_file,"data abort" );
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3'd1: $fwrite( decompile_file,"data abort" );
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3'd2: $fwrite( decompile_file,"firq" );
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3'd2: $fwrite( decompile_file,"firq" );
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3'd3: $fwrite( decompile_file,"irq" );
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3'd3: $fwrite( decompile_file,"irq" );
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3'd4: $fwrite( decompile_file,"address exception" );
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3'd4: $fwrite( decompile_file,"address exception" );
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| Line 428... |
Line 424... |
!execute_undefined &&
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!execute_undefined &&
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type != SWI &&
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type != SWI &&
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execute_address != get_32bit_signal(0) // Don't print jump to same address
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execute_address != get_32bit_signal(0) // Don't print jump to same address
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)
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)
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begin
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begin
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$fwrite(decompile_file,"%09d jump from ", clk_count);
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$fwrite(decompile_file,"%09d jump from ", `U_TB.clk_count);
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fwrite_hex_drop_zeros(decompile_file, pcf(execute_address));
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fwrite_hex_drop_zeros(decompile_file, pcf(execute_address));
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$fwrite(decompile_file," to ");
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$fwrite(decompile_file," to ");
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fwrite_hex_drop_zeros(decompile_file, pcf(get_32bit_signal(0)) ); // u_execute.pc_nxt
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fwrite_hex_drop_zeros(decompile_file, pcf(get_32bit_signal(0)) ); // u_execute.pc_nxt
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$fwrite(decompile_file,", r0 %08h, ", get_reg_val ( 5'd0 ));
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$fwrite(decompile_file,", r0 %08h, ", get_reg_val ( 5'd0 ));
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$fwrite(decompile_file,"r1 %08h\n", get_reg_val ( 5'd1 ));
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$fwrite(decompile_file,"r1 %08h\n", get_reg_val ( 5'd1 ));
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| Line 448... |
Line 444... |
always @( posedge i_clk )
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always @( posedge i_clk )
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// Data Write
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// Data Write
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if ( get_1bit_signal(0) && !get_1bit_signal(1) )
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if ( get_1bit_signal(0) && !get_1bit_signal(1) )
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begin
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begin
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$fwrite(decompile_file, "%09d write addr ", clk_count);
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$fwrite(decompile_file, "%09d write addr ", `U_TB.clk_count);
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tmp_address = get_32bit_signal(2);
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tmp_address = get_32bit_signal(2);
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fwrite_hex_drop_zeros(decompile_file, {tmp_address [31:2], 2'd0} );
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fwrite_hex_drop_zeros(decompile_file, {tmp_address [31:2], 2'd0} );
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$fwrite(decompile_file, ", data %08h, be %h",
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$fwrite(decompile_file, ", data %08h, be %h",
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get_32bit_signal(3), // u_cache.i_write_data
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get_32bit_signal(3), // u_cache.i_write_data
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| Line 466... |
Line 462... |
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// Data Read
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// Data Read
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else if (get_1bit_signal(3) && !get_1bit_signal(0) && !get_1bit_signal(1))
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else if (get_1bit_signal(3) && !get_1bit_signal(0) && !get_1bit_signal(1))
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begin
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begin
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$fwrite(decompile_file, "%09d read addr ", clk_count);
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$fwrite(decompile_file, "%09d read addr ", `U_TB.clk_count);
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tmp_address = get_32bit_signal(2);
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tmp_address = get_32bit_signal(2);
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fwrite_hex_drop_zeros(decompile_file, {tmp_address[31:2], 2'd0} );
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fwrite_hex_drop_zeros(decompile_file, {tmp_address[31:2], 2'd0} );
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$fwrite(decompile_file, ", data %08h", get_32bit_signal(4)); // u_decode.i_read_data
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$fwrite(decompile_file, ", data %08h", get_32bit_signal(4)); // u_decode.i_read_data
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