| Line 92... |
Line 92... |
output reg [1:0] o_byte_enable_sel = 'd0, // byte, halfword or word write
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output reg [1:0] o_byte_enable_sel = 'd0, // byte, halfword or word write
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output reg [2:0] o_status_bits_sel = 'd0,
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output reg [2:0] o_status_bits_sel = 'd0,
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output reg [2:0] o_reg_write_sel,
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output reg [2:0] o_reg_write_sel,
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output reg o_user_mode_regs_store_nxt,
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output reg o_user_mode_regs_store_nxt,
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output reg o_firq_not_user_mode,
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output reg o_firq_not_user_mode,
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output reg o_use_carry_in,
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output reg o_write_data_wen = 'd0,
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output reg o_write_data_wen = 'd0,
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output reg o_base_address_wen = 'd0, // save ldm base address register
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output reg o_base_address_wen = 'd0, // save ldm base address register
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// in case of data abort
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// in case of data abort
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output reg o_pc_wen = 1'd1,
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output reg o_pc_wen = 1'd1,
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| Line 218... |
Line 219... |
reg [2:0] pc_sel_nxt;
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reg [2:0] pc_sel_nxt;
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reg [1:0] byte_enable_sel_nxt;
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reg [1:0] byte_enable_sel_nxt;
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reg [2:0] status_bits_sel_nxt;
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reg [2:0] status_bits_sel_nxt;
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reg [2:0] reg_write_sel_nxt;
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reg [2:0] reg_write_sel_nxt;
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wire firq_not_user_mode_nxt;
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wire firq_not_user_mode_nxt;
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reg use_carry_in_nxt;
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// ALU Function signals
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// ALU Function signals
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reg alu_swap_sel_nxt;
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reg alu_swap_sel_nxt;
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reg alu_not_sel_nxt;
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reg alu_not_sel_nxt;
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reg [1:0] alu_cin_sel_nxt;
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reg [1:0] alu_cin_sel_nxt;
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| Line 743... |
Line 745... |
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// default Mux Select values
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// default Mux Select values
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barrel_shift_amount_sel_nxt = 'd0; // don't shift the input
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barrel_shift_amount_sel_nxt = 'd0; // don't shift the input
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barrel_shift_data_sel_nxt = 'd0; // immediate value
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barrel_shift_data_sel_nxt = 'd0; // immediate value
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barrel_shift_function_nxt = 'd0;
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barrel_shift_function_nxt = 'd0;
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use_carry_in_nxt = 'd0;
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multiply_function_nxt = 'd0;
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multiply_function_nxt = 'd0;
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iaddress_sel_nxt = 'd0;
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iaddress_sel_nxt = 'd0;
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daddress_sel_nxt = 'd0;
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daddress_sel_nxt = 'd0;
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pc_sel_nxt = 'd0;
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pc_sel_nxt = 'd0;
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load_pc_nxt = 'd0;
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load_pc_nxt = 'd0;
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| Line 816... |
Line 819... |
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if ( opcode == ADC ) // Add with Carry
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if ( opcode == ADC ) // Add with Carry
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begin
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begin
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alu_out_sel_nxt = 4'd1; // Add
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alu_out_sel_nxt = 4'd1; // Add
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alu_cin_sel_nxt = 2'd2; // carry in from status_bits
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alu_cin_sel_nxt = 2'd2; // carry in from status_bits
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use_carry_in_nxt = 1'd1;
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end
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end
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if ( opcode == SUB || opcode == CMP ) // Subtract
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if ( opcode == SUB || opcode == CMP ) // Subtract
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begin
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begin
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alu_out_sel_nxt = 4'd1; // Add
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alu_out_sel_nxt = 4'd1; // Add
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| Line 834... |
Line 838... |
if ( opcode == SBC ) // Subtract with Carry
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if ( opcode == SBC ) // Subtract with Carry
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begin
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begin
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alu_out_sel_nxt = 4'd1; // Add
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alu_out_sel_nxt = 4'd1; // Add
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alu_cin_sel_nxt = 2'd2; // carry in from status_bits
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alu_cin_sel_nxt = 2'd2; // carry in from status_bits
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alu_not_sel_nxt = 1'd1; // invert B
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alu_not_sel_nxt = 1'd1; // invert B
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use_carry_in_nxt = 1'd1;
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end
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end
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if ( opcode == RSB ) // Reverse Subtract
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if ( opcode == RSB ) // Reverse Subtract
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begin
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begin
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alu_out_sel_nxt = 4'd1; // Add
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alu_out_sel_nxt = 4'd1; // Add
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alu_cin_sel_nxt = 2'd1; // cin = 1
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alu_cin_sel_nxt = 2'd1; // cin = 1
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alu_not_sel_nxt = 1'd1; // invert B
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alu_not_sel_nxt = 1'd1; // invert B
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alu_swap_sel_nxt = 1'd1; // swap A and B
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alu_swap_sel_nxt = 1'd1; // swap A and B
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use_carry_in_nxt = 1'd1;
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end
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end
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if ( opcode == RSC ) // Reverse Subtract with carry
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if ( opcode == RSC ) // Reverse Subtract with carry
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begin
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begin
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alu_out_sel_nxt = 4'd1; // Add
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alu_out_sel_nxt = 4'd1; // Add
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| Line 1604... |
Line 1610... |
o_rn_sel <= rn_sel_nxt;
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o_rn_sel <= rn_sel_nxt;
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o_barrel_shift_amount_sel <= barrel_shift_amount_sel_nxt;
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o_barrel_shift_amount_sel <= barrel_shift_amount_sel_nxt;
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o_barrel_shift_data_sel <= barrel_shift_data_sel_nxt;
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o_barrel_shift_data_sel <= barrel_shift_data_sel_nxt;
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o_barrel_shift_function <= barrel_shift_function_nxt;
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o_barrel_shift_function <= barrel_shift_function_nxt;
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o_alu_function <= alu_function_nxt;
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o_alu_function <= alu_function_nxt;
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o_use_carry_in <= use_carry_in_nxt;
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o_multiply_function <= multiply_function_nxt;
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o_multiply_function <= multiply_function_nxt;
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o_interrupt_vector_sel <= next_interrupt;
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o_interrupt_vector_sel <= next_interrupt;
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o_iaddress_sel <= iaddress_sel_nxt;
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o_iaddress_sel <= iaddress_sel_nxt;
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o_daddress_sel <= daddress_sel_nxt;
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o_daddress_sel <= daddress_sel_nxt;
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o_pc_sel <= pc_sel_nxt;
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o_pc_sel <= pc_sel_nxt;
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