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[/] [amber/] [trunk/] [hw/] [vlog/] [amber25/] [a25_decompile.v] - Diff between revs 35 and 58

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Rev 35 Rev 58
Line 84... Line 84...
reg     [(5*8)-1:0]    xINSTRUCTION_EXECUTE_R = "---   ";
reg     [(5*8)-1:0]    xINSTRUCTION_EXECUTE_R = "---   ";
wire    [(8*8)-1:0]    TYPE_NAME;
wire    [(8*8)-1:0]    TYPE_NAME;
reg     [3:0]          fchars;
reg     [3:0]          fchars;
reg     [31:0]         execute_address = 'd0;
reg     [31:0]         execute_address = 'd0;
reg     [2:0]          interrupt_d1;
reg     [2:0]          interrupt_d1;
reg     [31:0]         clk_count = 'd0;
 
reg     [31:0]         execute_instruction = 'd0;
reg     [31:0]         execute_instruction = 'd0;
reg                    execute_now = 'd0;
reg                    execute_now = 'd0;
reg                    execute_valid = 'd0;
reg                    execute_valid = 'd0;
reg                    execute_undefined = 'd0;
reg                    execute_undefined = 'd0;
 
 
Line 250... Line 249...
    end
    end
 
 
always @ ( posedge i_clk )
always @ ( posedge i_clk )
    xINSTRUCTION_EXECUTE_R <= xINSTRUCTION_EXECUTE;
    xINSTRUCTION_EXECUTE_R <= xINSTRUCTION_EXECUTE;
 
 
always @( posedge i_clk )
 
    clk_count <= clk_count + 1'd1;
 
 
 
// =================================================================================
// =================================================================================
// Memory Reads and Writes
// Memory Reads and Writes
// =================================================================================
// =================================================================================
 
 
reg [31:0] tmp_address;
reg [31:0] tmp_address;
Line 266... Line 262...
    begin
    begin
    // Data Write    
    // Data Write    
    if ( get_1bit_signal(0) && !get_1bit_signal(3) )
    if ( get_1bit_signal(0) && !get_1bit_signal(3) )
        begin
        begin
 
 
        $fwrite(decompile_file, "%09d              write   addr ", clk_count);
        $fwrite(decompile_file, "%09d              write   addr ", `U_TB.clk_count);
        tmp_address = get_32bit_signal(2);
        tmp_address = get_32bit_signal(2);
        fwrite_hex_drop_zeros(decompile_file, {tmp_address [31:2], 2'd0} );
        fwrite_hex_drop_zeros(decompile_file, {tmp_address [31:2], 2'd0} );
 
 
        $fwrite(decompile_file, ", data %08h, be %h",
        $fwrite(decompile_file, ", data %08h, be %h",
                get_32bit_signal(3),    // u_cache.i_write_data
                get_32bit_signal(3),    // u_cache.i_write_data
Line 280... Line 276...
        end
        end
 
 
    // Data Read    
    // Data Read    
    if ( get_1bit_signal(4) && !get_1bit_signal(1) )
    if ( get_1bit_signal(4) && !get_1bit_signal(1) )
        begin
        begin
        $fwrite(decompile_file, "%09d              read    addr ", clk_count);
        $fwrite(decompile_file, "%09d              read    addr ", `U_TB.clk_count);
        tmp_address = get_32bit_signal(5);
        tmp_address = get_32bit_signal(5);
        fwrite_hex_drop_zeros(decompile_file, {tmp_address[31:2], 2'd0} );
        fwrite_hex_drop_zeros(decompile_file, {tmp_address[31:2], 2'd0} );
 
 
        $fwrite(decompile_file, ", data %08h to ", get_32bit_signal(4));
        $fwrite(decompile_file, ", data %08h to ", get_32bit_signal(4));
        warmreg(get_4bit_signal(1));
        warmreg(get_4bit_signal(1));
Line 297... Line 293...
        begin
        begin
 
 
            // Interrupts override instructions that are just starting
            // Interrupts override instructions that are just starting
        if ( interrupt_d1 == 3'd0 || interrupt_d1 == 3'd7 )
        if ( interrupt_d1 == 3'd0 || interrupt_d1 == 3'd7 )
            begin
            begin
            $fwrite(decompile_file,"%09d  ", clk_count);
            $fwrite(decompile_file,"%09d  ", `U_TB.clk_count);
 
 
            // Right justify the address
            // Right justify the address
            if      ( execute_address < 32'h10)        $fwrite(decompile_file,"       %01x:  ", {execute_address[ 3:1], 1'd0});
            if      ( execute_address < 32'h10)        $fwrite(decompile_file,"       %01x:  ", {execute_address[ 3:1], 1'd0});
            else if ( execute_address < 32'h100)       $fwrite(decompile_file,"      %02x:  ",  {execute_address[ 7:1], 1'd0});
            else if ( execute_address < 32'h100)       $fwrite(decompile_file,"      %02x:  ",  {execute_address[ 7:1], 1'd0});
            else if ( execute_address < 32'h1000)      $fwrite(decompile_file,"     %03x:  ",   {execute_address[11:1], 1'd0});
            else if ( execute_address < 32'h1000)      $fwrite(decompile_file,"     %03x:  ",   {execute_address[11:1], 1'd0});
Line 315... Line 311...
            // condition field in execute stage allows instruction to execute ?
            // condition field in execute stage allows instruction to execute ?
            if (!i_instruction_execute)
            if (!i_instruction_execute)
                begin
                begin
                $fwrite(decompile_file,"-");
                $fwrite(decompile_file,"-");
                if ( type == SWI )
                if ( type == SWI )
                    $display ("Cycle %09d  SWI not taken *************", clk_count);
                    $display ("Cycle %09d  SWI not taken *************", `U_TB.clk_count);
                end
                end
            else
            else
                $fwrite(decompile_file," ");
                $fwrite(decompile_file," ");
 
 
            // ========================================
            // ========================================
Line 404... Line 400...
            end
            end
 
 
        // Undefined Instruction Interrupts    
        // Undefined Instruction Interrupts    
        if ( i_instruction_execute && execute_undefined )
        if ( i_instruction_execute && execute_undefined )
            begin
            begin
            $fwrite( decompile_file,"%09d              interrupt undefined instruction", clk_count );
            $fwrite( decompile_file,"%09d              interrupt undefined instruction", `U_TB.clk_count );
            $fwrite( decompile_file,", return addr " );
            $fwrite( decompile_file,", return addr " );
            $fwrite( decompile_file,"%08x\n",  pcf(get_reg_val(5'd21)-4'd4) );
            $fwrite( decompile_file,"%08x\n",  pcf(get_reg_val(5'd21)-4'd4) );
            end
            end
 
 
        // Software Interrupt  
        // Software Interrupt  
        if ( i_instruction_execute && type == SWI )
        if ( i_instruction_execute && type == SWI )
            begin
            begin
            $fwrite( decompile_file,"%09d              interrupt swi", clk_count );
            $fwrite( decompile_file,"%09d              interrupt swi", `U_TB.clk_count );
            $fwrite( decompile_file,", return addr " );
            $fwrite( decompile_file,", return addr " );
            $fwrite( decompile_file,"%08x\n",  pcf(get_reg_val(5'd21)-4'd4) );
            $fwrite( decompile_file,"%08x\n",  pcf(get_reg_val(5'd21)-4'd4) );
            end
            end
        end
        end
    end
    end
Line 429... Line 425...
        interrupt_d1 <= i_interrupt;
        interrupt_d1 <= i_interrupt;
 
 
        // Asynchronous Interrupts    
        // Asynchronous Interrupts    
        if ( interrupt_d1 != 3'd0 && i_interrupt_state )
        if ( interrupt_d1 != 3'd0 && i_interrupt_state )
            begin
            begin
            $fwrite( decompile_file,"%09d              interrupt ", clk_count );
            $fwrite( decompile_file,"%09d              interrupt ", `U_TB.clk_count );
            case ( interrupt_d1 )
            case ( interrupt_d1 )
                3'd1:    $fwrite( decompile_file,"data abort" );
                3'd1:    $fwrite( decompile_file,"data abort" );
                3'd2:    $fwrite( decompile_file,"firq" );
                3'd2:    $fwrite( decompile_file,"firq" );
                3'd3:    $fwrite( decompile_file,"irq" );
                3'd3:    $fwrite( decompile_file,"irq" );
                3'd4:    $fwrite( decompile_file,"address exception" );
                3'd4:    $fwrite( decompile_file,"address exception" );
Line 467... Line 463...
             !execute_undefined &&
             !execute_undefined &&
             type != SWI &&
             type != SWI &&
             execute_address != get_32bit_signal(0)  // Don't print jump to same address
             execute_address != get_32bit_signal(0)  // Don't print jump to same address
             )
             )
            begin
            begin
            $fwrite(decompile_file,"%09d              jump    from ", clk_count);
            $fwrite(decompile_file,"%09d              jump    from ", `U_TB.clk_count);
            fwrite_hex_drop_zeros(decompile_file,  pcf(execute_address));
            fwrite_hex_drop_zeros(decompile_file,  pcf(execute_address));
            $fwrite(decompile_file," to ");
            $fwrite(decompile_file," to ");
            fwrite_hex_drop_zeros(decompile_file,  pcf(get_32bit_signal(0)) ); // u_execute.pc_nxt
            fwrite_hex_drop_zeros(decompile_file,  pcf(get_32bit_signal(0)) ); // u_execute.pc_nxt
            $fwrite(decompile_file,", r0 %08h, ",  get_reg_val ( 5'd0 ));
            $fwrite(decompile_file,", r0 %08h, ",  get_reg_val ( 5'd0 ));
            $fwrite(decompile_file,"r1 %08h\n",    get_reg_val ( 5'd1 ));
            $fwrite(decompile_file,"r1 %08h\n",    get_reg_val ( 5'd1 ));

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