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[/] [amber/] [trunk/] [hw/] [vlog/] [system/] [boot_mem32.v] - Diff between revs 40 and 61

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Rev 40 Rev 61
Line 43... Line 43...
 
 
 
 
module boot_mem32 #(
module boot_mem32 #(
parameter WB_DWIDTH   = 32,
parameter WB_DWIDTH   = 32,
parameter WB_SWIDTH   = 4,
parameter WB_SWIDTH   = 4,
parameter MADDR_WIDTH = 11
parameter MADDR_WIDTH = 12
)(
)(
input                       i_wb_clk,     // WISHBONE clock
input                       i_wb_clk,     // WISHBONE clock
 
 
input       [31:0]          i_wb_adr,
input       [31:0]          i_wb_adr,
input       [WB_SWIDTH-1:0] i_wb_sel,
input       [WB_SWIDTH-1:0] i_wb_sel,
Line 117... Line 117...
// ------------------------------------------------------
// ------------------------------------------------------
// Instantiate SRAMs
// Instantiate SRAMs
// ------------------------------------------------------
// ------------------------------------------------------
//         
//         
`ifdef XILINX_FPGA
`ifdef XILINX_FPGA
 
    xs6_sram_4096x32_byte_en
    `ifdef XILINX_SPARTAN6_FPGA
 
        xs6_sram_2048x32_byte_en
 
    `endif
 
    `ifdef XILINX_VIRTEX6_FPGA
 
        xv6_sram_2048x32_byte_en
 
    `endif
 
 
 
#(
#(
// This file holds a software image used for FPGA simulations
// This file holds a software image used for FPGA simulations
// This pre-processor syntax works with both the simulator
// This pre-processor syntax works with both the simulator
// and ISE, which I couldn't get to work with giving it the
// and ISE, which I couldn't get to work with giving it the
// file name as a define.
// file name as a define.
 
 
`ifdef BOOT_MEM_PARAMS_FILE
`ifdef BOOT_MEM_PARAMS_FILE
    `include `BOOT_MEM_PARAMS_FILE
    `include `BOOT_MEM_PARAMS_FILE
`else
`else
 
    `ifdef BOOT_LOADER_ETHMAC
 
        `include "boot-loader-ethmac_memparams32.v"
 
    `else
    // default file
    // default file
    `include "boot-loader_memparams32.v"
    `include "boot-loader_memparams32.v"
`endif
`endif
 
`endif
 
 
)
)
`endif
`endif
 
 
`ifndef XILINX_FPGA
`ifndef XILINX_FPGA

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