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[/] [amber/] [trunk/] [hw/] [vlog/] [system/] [system.v] - Diff between revs 36 and 38

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Rev 36 Rev 38
Line 653... Line 653...
    // -------------------------------------------------------------
    // -------------------------------------------------------------
    // Instantiate Wishbone to Xilinx Spartan-6 DDR3 Bridge
    // Instantiate Wishbone to Xilinx Spartan-6 DDR3 Bridge
    // -------------------------------------------------------------
    // -------------------------------------------------------------
    // The clock crossing fifo for virtex-6 is insode the bridge
    // The clock crossing fifo for virtex-6 is insode the bridge
    // module
    // module
    wb_xv6_ddr3_bridge u_wb_xv6_ddr3_bridge (
    wb_xv6_ddr3_bridge    #(
 
        .WB_DWIDTH              ( WB_DWIDTH             ),
 
        .WB_SWIDTH              ( WB_SWIDTH             )
 
        )
 
    u_wb_xv6_ddr3_bridge (
        .i_sys_clk              ( sys_clk               ),
        .i_sys_clk              ( sys_clk               ),
        .i_ddr_clk              ( xv6_ddr3_clk          ),
        .i_ddr_clk              ( xv6_ddr3_clk          ),
 
 
        .o_ddr_cmd_en           ( xv6_cmd_en            ),
        .o_ddr_cmd_en           ( xv6_cmd_en            ),
        .o_ddr_cmd_instr        ( xv6_cmd_instr         ),
        .o_ddr_cmd_instr        ( xv6_cmd_instr         ),

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