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[/] [amber/] [trunk/] [hw/] [vlog/] [system/] [system.v] - Diff between revs 36 and 38
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Rev 36 |
Rev 38 |
Line 653... |
Line 653... |
// -------------------------------------------------------------
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// -------------------------------------------------------------
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// Instantiate Wishbone to Xilinx Spartan-6 DDR3 Bridge
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// Instantiate Wishbone to Xilinx Spartan-6 DDR3 Bridge
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// -------------------------------------------------------------
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// -------------------------------------------------------------
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// The clock crossing fifo for virtex-6 is insode the bridge
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// The clock crossing fifo for virtex-6 is insode the bridge
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// module
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// module
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wb_xv6_ddr3_bridge u_wb_xv6_ddr3_bridge (
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wb_xv6_ddr3_bridge #(
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.WB_DWIDTH ( WB_DWIDTH ),
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.WB_SWIDTH ( WB_SWIDTH )
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)
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u_wb_xv6_ddr3_bridge (
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.i_sys_clk ( sys_clk ),
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.i_sys_clk ( sys_clk ),
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.i_ddr_clk ( xv6_ddr3_clk ),
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.i_ddr_clk ( xv6_ddr3_clk ),
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.o_ddr_cmd_en ( xv6_cmd_en ),
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.o_ddr_cmd_en ( xv6_cmd_en ),
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.o_ddr_cmd_instr ( xv6_cmd_instr ),
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.o_ddr_cmd_instr ( xv6_cmd_instr ),
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