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[/] [amber/] [trunk/] [hw/] [vlog/] [tb/] [tb.v] - Diff between revs 2 and 11
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| Rev 2 |
Rev 11 |
| Line 389... |
Line 389... |
main_mem_file_data = hex_chars_to_32bits (aligned_line[110*8-1:102*8]);
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main_mem_file_data = hex_chars_to_32bits (aligned_line[110*8-1:102*8]);
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`ifdef XILINX_FPGA
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`ifdef XILINX_FPGA
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mm_ddr3_addr = {main_mem_file_address[13:11], main_mem_file_address[26:14], main_mem_file_address[10:4]};
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mm_ddr3_addr = {main_mem_file_address[13:11], main_mem_file_address[26:14], main_mem_file_address[10:4]};
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main_mem_file_data_128 = tb.u_ddr3_model_c3.memory [mm_ddr3_addr];
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main_mem_file_data_128 = tb.u_ddr3_model.memory [mm_ddr3_addr];
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tb.u_ddr3_model_c3.memory [mm_ddr3_addr] =
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tb.u_ddr3_model.memory [mm_ddr3_addr] =
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insert_32_into_128 ( main_mem_file_address[3:2],
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insert_32_into_128 ( main_mem_file_address[3:2],
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main_mem_file_data_128,
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main_mem_file_data_128,
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main_mem_file_data );
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main_mem_file_data );
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`ifdef AMBER_LOAD_MEM_DEBUG
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`ifdef AMBER_LOAD_MEM_DEBUG
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main_mem_file_data_128 = tb.u_ddr3_model_c3.memory [mm_ddr3_addr];
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main_mem_file_data_128 = tb.u_ddr3_model.memory [mm_ddr3_addr];
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$display ("Load DDR3: PAddr: 0x%08x, DDR3 Addr 0x%08h, Data 0x%032x",
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$display ("Load DDR3: PAddr: 0x%08x, DDR3 Addr 0x%08h, Data 0x%032x",
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main_mem_file_address, mm_ddr3_addr, main_mem_file_data_128);
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main_mem_file_address, mm_ddr3_addr, main_mem_file_data_128);
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`endif
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`endif
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`else
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`else
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