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URL https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk

Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [change.log] - Diff between revs 42 and 43

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All notable changes to this project will be documented in this file.
All notable changes to this project will be documented in this file.
 
 
 
 
 
##[1.9.0] -30-04-2019
 
## Added
 
- add single flit sized packet support
 
- add new topologies: Fattree, tree, concentrated mesh (Cmesh)
 
- Topology Diagram Viewer
 
 
 
## changed
 
- The endpoint and router addresses format has been changed to support different topologies.
 
 
 
 
 
 
##[1.8.2] -13-12-2018
##[1.8.2] -13-12-2018
## Added
## Added
- add latency standard deviation to simulation results graphs
- add latency standard deviation to simulation results graphs
- add Simple message passing demo on 4×4 MPSoC
- add Simple message passing demo on 4×4 MPSoC
- add some error flags to NI
- add some error flags to NI
## changed
## changed
- fix some bugs in NI
- fix some bugs in NI
- Enable Verilator simulation on MPSoC
- Enable Verilator simulation on MPSoC
 
 
 
##[1.8.1] - 30-7-2018
 
## Added
 
-  GUI for setting Linux variables
 
## changed
 
-  Support NoC Simulation for packet payload width larger than 32-bits and core number larger than 64.
 
 
 
 
##[1.8.1] - 30-7-2018
##[1.8.1] - 30-7-2018
## Added
## Added
-  GUI for setting Linux variables
-  GUI for setting Linux variables
## changed
## changed

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