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[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [perl_gui/] [lib/] [interface/] [clk.ITC] - Diff between revs 16 and 17

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Rev 16 Rev 17
Line 10... Line 10...
                                 },
                                 },
                    'ports' => {
                    'ports' => {
                                 'clk_o' => {
                                 'clk_o' => {
                                              'outport_type' => 'concatenate',
                                              'outport_type' => 'concatenate',
                                              'connect_name' => 'clk_i',
                                              'connect_name' => 'clk_i',
                                              'connect_type' => 'input',
 
                                              'range' => '',
 
                                              'name' => 'clk_o',
                                              'name' => 'clk_o',
 
                                              'range' => '',
 
                                              'connect_type' => 'input',
                                              'connect_range' => '',
                                              'connect_range' => '',
 
                                              'default_out' => 'Active low',
                                              'type' => 'output'
                                              'type' => 'output'
                                            }
                                            }
                               },
                               },
                    'file_name' => '/home/alireza/Mywork/develop/gui/main/lib/verilog/bus.v',
                    'file_name' => '/home/alireza/Mywork/develop/gui/main/lib/verilog/bus.v',
                    'module_name' => 'clk_socket',
                    'module_name' => 'clk_socket',

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