URL
https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
Rev 38 |
Rev 48 |
Line 8... |
Line 8... |
## WARNING: THIS IS AN AUTO-GENERATED FILE. CHANGES TO IT
|
## WARNING: THIS IS AN AUTO-GENERATED FILE. CHANGES TO IT
|
## MAY CAUSE UNEXPECTED BEHAIVOR.
|
## MAY CAUSE UNEXPECTED BEHAIVOR.
|
################################################################################
|
################################################################################
|
|
|
$HashRef = bless( {
|
$HashRef = bless( {
|
'file_name' => '/home/alireza/Mywork/mpsoc/src_peripheral/int_ctrl/int_ctrl.v',
|
'file_name' => 'mpsoc/rtl/src_peripheral/int_ctrl/int_ctrl.v',
|
'description' => 'interrupt signal between interrupt controller and cpu',
|
'description' => 'interrupt signal between interrupt controller and cpu',
|
'modules' => {
|
'modules' => {
|
'int_ctrl' => {}
|
'int_ctrl' => {}
|
},
|
},
|
'gui_status' => {
|
'gui_status' => {
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.