| Line 11... |
Line 11... |
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|
|
|
|
sub mpsoc_generate_verilog{
|
sub mpsoc_generate_verilog{
|
my $mpsoc=shift;
|
my $mpsoc=shift;
|
my $mpsoc_name=$mpsoc->mpsoc_get_mpsoc_name();
|
my $mpsoc_name=$mpsoc->object_get_attribute('mpsoc_name');
|
my $io_v="\tclk,\n\treset";
|
my $io_v="\tclk,\n\treset";
|
my $io_def_v="
|
my $io_def_v="
|
//IO
|
//IO
|
\tinput\tclk,reset;\n";
|
\tinput\tclk,reset;\n";
|
my $param_as_in_v;
|
my $param_as_in_v;
|
|
|
#generate socs_parameter
|
#generate socs_parameter
|
my $socs_param= gen_socs_param($mpsoc);
|
my $socs_param= gen_socs_param($mpsoc);
|
|
|
#generate noc_parameter
|
#generate noc_parameter
|
my $noc_param=gen_noc_param_v($mpsoc);
|
my ($noc_param,$pass_param)=gen_noc_param_v($mpsoc);
|
|
|
#generate the noc
|
#generate the noc
|
my $noc_v=gen_noc_v();
|
my $noc_v=gen_noc_v();
|
|
|
#generate socs
|
#generate socs
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| Line 68... |
Line 68... |
endfunction
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endfunction
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localparam Fw = 2+V+Fpay,
|
localparam Fw = 2+V+Fpay,
|
NC = NX*NY, //flit width;
|
NC = (TOPOLOGY=="RING")? NX : NX*NY, //number of cores
|
Xw = log2(NX),
|
Xw = log2(NX),
|
Yw = log2(NY) ,
|
Yw = log2(NY) ,
|
Cw = (C>1)? log2(C): 1,
|
Cw = (C>1)? log2(C): 1,
|
NCw = log2(NC),
|
NCw = log2(NC),
|
NCV = NC * V,
|
NCV = NC * V,
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| Line 88... |
Line 88... |
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sub gen_socs_param{
|
sub gen_socs_param{
|
my $mpsoc=shift;
|
my $mpsoc=shift;
|
my $socs_param="
|
my $socs_param="
|
//SOC parameters\n";
|
//SOC parameters\n";
|
my $nx= $mpsoc->mpsoc_get_param("NX");
|
my $nx= $mpsoc->object_get_attribute('noc_param',"NX");
|
my $ny= $mpsoc->mpsoc_get_param("NY");
|
my $ny= $mpsoc->object_get_attribute('noc_param',"NY");
|
my $processors_en=0;
|
my $processors_en=0;
|
for (my $y=0;$y<$ny;$y++){
|
for (my $y=0;$y<$ny;$y++){
|
for (my $x=0; $x<$nx;$x++){
|
for (my $x=0; $x<$nx;$x++){
|
my $tile=($nx*$y)+ $x;
|
my $tile=($nx*$y)+ $x;
|
my ($soc_name,$n,$soc_num)=$mpsoc->mpsoc_get_tile_soc_name($tile);
|
my ($soc_name,$n,$soc_num)=$mpsoc->mpsoc_get_tile_soc_name($tile);
|
| Line 130... |
Line 130... |
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|
|
|
sub gen_noc_param_v{
|
sub gen_noc_param_v{
|
my $mpsoc=shift;
|
my $mpsoc=shift;
|
my $param_v="\n\n//NoC parameters\n";
|
my $param_v="\n\n//NoC parameters\n";
|
my @params=$mpsoc->mpsoc_get_param_order();
|
my $pass_param;
|
|
my @params=$mpsoc->object_get_attribute_order('noc_param');
|
foreach my $p (@params){
|
foreach my $p (@params){
|
my $val=$mpsoc->mpsoc_get_param($p);
|
my $val=$mpsoc->object_get_attribute('noc_param',$p);
|
add_text_to_string (\$param_v,"\tlocalparam $p=$val;\n");
|
add_text_to_string (\$param_v,"\tlocalparam $p=$val;\n");
|
#print "$p\n";
|
add_text_to_string (\$pass_param,".$p($p),\n");
|
|
#print "$p:$val\n";
|
|
|
}
|
}
|
my $class=$mpsoc->mpsoc_get_param("C");
|
my $class=$mpsoc->object_get_attribute('noc_param',"C");
|
my $str;
|
my $str;
|
if( $class > 1){
|
if( $class > 1){
|
$str="CLASS_SETTING={";
|
$str="CLASS_SETTING={";
|
for (my $i=$class-1; $i>=0;$i--){
|
for (my $i=$class-1; $i>=0;$i--){
|
$str=($i==0)? "${str}Cn_0};\n " : "${str}Cn_$i,";
|
$str=($i==0)? "${str}Cn_0};\n " : "${str}Cn_$i,";
|
}
|
}
|
}else {
|
}else {
|
$str="CLASS_SETTING={V{1\'b1}};\n";
|
$str="CLASS_SETTING={V{1\'b1}};\n";
|
}
|
}
|
add_text_to_string (\$param_v,"\tlocalparam $str");
|
add_text_to_string (\$param_v,"\tlocalparam $str");
|
my $v=$mpsoc->mpsoc_get_param("V")-1;
|
add_text_to_string (\$pass_param,".CLASS_SETTING(CLASS_SETTING),\n");
|
my $escape=$mpsoc->mpsoc_get_param("ESCAP_VC_MASK");
|
my $v=$mpsoc->object_get_attribute('noc_param',"V")-1;
|
add_text_to_string (\$param_v,"\tlocalparam [$v :0] ESCAP_VC_MASK=1;\n") if (! defined $escape);
|
my $escape=$mpsoc->object_get_attribute('noc_param',"ESCAP_VC_MASK");
|
|
if (! defined $escape){
|
|
add_text_to_string (\$param_v,"\tlocalparam [$v :0] ESCAP_VC_MASK=1;\n");
|
|
add_text_to_string (\$pass_param,".ESCAP_VC_MASK(ESCAP_VC_MASK),\n");
|
|
}
|
add_text_to_string (\$param_v," \tlocalparam CVw=(C==0)? V : C * V;\n");
|
add_text_to_string (\$param_v," \tlocalparam CVw=(C==0)? V : C * V;\n");
|
|
add_text_to_string (\$pass_param,".CVw(CVw)\n");
|
|
|
|
|
|
return ($param_v,$pass_param);
|
return $param_v;
|
|
|
|
|
|
|
|
}
|
}
|
|
|
| Line 332... |
Line 338... |
|
|
|
|
|
|
my $socs_v;
|
my $socs_v;
|
|
|
my $nx= $mpsoc->mpsoc_get_param("NX");
|
my $nx= $mpsoc->object_get_attribute('noc_param',"NX");
|
my $ny= $mpsoc->mpsoc_get_param("NY");
|
my $ny= $mpsoc->object_get_attribute('noc_param',"NY");
|
my $processors_en=0;
|
my $processors_en=0;
|
for (my $y=0;$y<$ny;$y++){
|
for (my $y=0;$y<$ny;$y++){
|
for (my $x=0; $x<$nx;$x++){
|
for (my $x=0; $x<$nx;$x++){
|
my $tile_num=($nx*$y)+ $x;
|
my $tile_num=($nx*$y)+ $x;
|
|
|
| Line 381... |
Line 387... |
|
|
sub gen_soc_v{
|
sub gen_soc_v{
|
my ($mpsoc,$soc_name,$tile_num,$x,$y,$soc_num,$io_v_ref,$io_def_v)=@_;
|
my ($mpsoc,$soc_name,$tile_num,$x,$y,$soc_num,$io_v_ref,$io_def_v)=@_;
|
my $soc_v;
|
my $soc_v;
|
my $processor_en=0;
|
my $processor_en=0;
|
my $xw= log2($mpsoc->mpsoc_get_param("NX"));
|
my $xw= log2($mpsoc->object_get_attribute('noc_param',"NX"));
|
my $yw= log2($mpsoc->mpsoc_get_param("NY"));
|
my $yw= log2($mpsoc->object_get_attribute('noc_param',"NY"));
|
$soc_v="\n\n // Tile:$tile_num (x=$x,y=$y)\n \t$soc_name #(\n";
|
$soc_v="\n\n // Tile:$tile_num (x=$x,y=$y)\n \t$soc_name #(\n";
|
|
|
# core id
|
# core id
|
add_text_to_string(\$soc_v,"\t\t.CORE_ID($tile_num)");
|
add_text_to_string(\$soc_v,"\t\t.CORE_ID($tile_num)");
|
|
|
| Line 414... |
Line 420... |
add_text_to_string(\$soc_v,"\n\t)the_${soc_name}_$soc_num(\n");
|
add_text_to_string(\$soc_v,"\n\t)the_${soc_name}_$soc_num(\n");
|
|
|
my @intfcs=$top->top_get_intfc_list();
|
my @intfcs=$top->top_get_intfc_list();
|
|
|
my $i=0;
|
my $i=0;
|
|
|
|
my $dir = Cwd::getcwd();
|
|
my $mpsoc_name=$mpsoc->object_get_attribute('mpsoc_name');
|
|
my $project_dir = abs_path("$dir/../../");
|
|
my $target_dir = "$project_dir/mpsoc_work/MPSOC/$mpsoc_name";
|
|
my $soc_file="$target_dir/src_verilog/tiles/$soc_name.v";
|
|
|
|
my $vdb =read_file($soc_file);
|
|
|
|
my %soc_localparam = $vdb->get_modules_parameters($soc_name);
|
|
|
|
|
foreach my $intfc (@intfcs){
|
foreach my $intfc (@intfcs){
|
|
|
# ni intfc
|
# ni intfc
|
if( $intfc eq 'socket:ni[0]'){
|
if( $intfc eq 'socket:ni[0]'){
|
my @ports=$top->top_get_intfc_ports_list($intfc);
|
my @ports=$top->top_get_intfc_ports_list($intfc);
|
| Line 475... |
Line 493... |
#other interface
|
#other interface
|
my @ports=$top->top_get_intfc_ports_list($intfc);
|
my @ports=$top->top_get_intfc_ports_list($intfc);
|
foreach my $p (@ports){
|
foreach my $p (@ports){
|
my($inst,$range,$type,$intfc_name,$intfc_port)= $top->top_get_port($p);
|
my($inst,$range,$type,$intfc_name,$intfc_port)= $top->top_get_port($p);
|
my $io_port="${soc_name}_${soc_num}_${p}";
|
my $io_port="${soc_name}_${soc_num}_${p}";
|
|
#resolve range parameter
|
|
if (defined $range ){
|
|
my @a= split (/\b/,$range);
|
|
foreach my $l (@a){
|
|
#if defined in parameter list ignore it
|
|
next if(defined $params{$l});
|
|
($range=$range)=~ s/\b$l\b/$soc_localparam{$l}/g if(defined $soc_localparam{$l});
|
|
#else s
|
|
|
|
#print "$l\n";
|
|
}
|
|
|
|
}
|
#io name
|
#io name
|
add_text_to_string($io_v_ref,",\n\t$io_port");
|
add_text_to_string($io_v_ref,",\n\t$io_port");
|
#io definition
|
#io definition
|
my $new_range = add_instantc_name_to_parameters(\%params,"${soc_name}_$soc_num",$range);
|
my $new_range = add_instantc_name_to_parameters(\%params,"${soc_name}_$soc_num",$range);
|
#my $new_range=$range;
|
#my $new_range=$range;
|
| Line 522... |
Line 553... |
}
|
}
|
return $log;
|
return $log;
|
}
|
}
|
|
|
|
|
|
|
|
sub gen_emulate_top_v{
|
|
my $emulate=shift;
|
|
my ($localparam, $pass_param)=gen_noc_param_v( $emulate);
|
|
my $top_v="
|
|
|
|
module emulator_top (
|
|
output [0:0]LEDR,
|
|
output [0:0]LEDG,
|
|
input [0:0]KEY,
|
|
input CLOCK_50
|
|
);
|
|
|
|
|
|
|
|
|
|
$localparam
|
|
|
|
|
|
wire reset_in,jtag_reset,reset,reset_sync;
|
|
|
|
assign reset_in = ~KEY[0];
|
|
assign LEDG[0] = reset;
|
|
assign reset = (jtag_reset | reset_in);
|
|
wire done;
|
|
reg[31:0]time_cnt;
|
|
|
|
// a reset source which can be controled using jtag
|
|
jtag_source_probe #(
|
|
.VJTAG_INDEX(127),
|
|
.Dw(1) //source/probe width in bits
|
|
)the_reset(
|
|
.probe(done),
|
|
.source(jtag_reset)
|
|
);
|
|
|
|
altera_reset_synchronizer rst_sync
|
|
(
|
|
.reset_in(reset),
|
|
.clk(CLOCK_50),
|
|
.reset_out(reset_sync)
|
|
);
|
|
|
|
|
|
|
|
noc_emulator #(
|
|
$pass_param
|
|
|
|
// simulation
|
|
// parameter MAX_PCK_NUM=2560000,
|
|
// parameter MAX_SIM_CLKs=1000000,
|
|
// parameter MAX_PCK_SIZ=10,
|
|
// parameter TIMSTMP_FIFO_NUM=16
|
|
)
|
|
emulate_top
|
|
(
|
|
.reset(reset_sync),
|
|
.clk(CLOCK_50),
|
|
.done(done)
|
|
);
|
|
|
|
|
|
jtag_source_probe #(
|
|
.VJTAG_INDEX(126),
|
|
.Dw(32) //source/probe width in bits
|
|
|
|
|
|
)
|
|
src_pb
|
|
(
|
|
.probe(time_cnt),
|
|
.source()
|
|
);
|
|
|
|
|
|
always @(posedge CLOCK_50 or posedge reset)begin
|
|
if(reset) begin
|
|
time_cnt<=0;
|
|
end else begin
|
|
if(!done) time_cnt<=time_cnt+1;
|
|
end
|
|
end
|
|
|
|
|
|
assign LEDR[0]=done;
|
|
|
|
|
|
endmodule
|
|
|
|
|
|
";
|
|
return $top_v;
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
1
|
1
|
|
|
No newline at end of file
|
No newline at end of file
|
