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use strict;
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use strict;
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use warnings;
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use warnings;
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use FindBin;
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use lib $FindBin::Bin;
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use mpsoc;
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use mpsoc;
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use soc;
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use soc;
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use ip;
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use ip;
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use ip_gen;
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use ip_gen;
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use Cwd;
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use Cwd;
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| Line 36... |
Line 40... |
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#generate noc_parameter
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#generate noc_parameter
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my ($noc_param,$pass_param)=gen_noc_param_v($mpsoc);
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my ($noc_param,$pass_param)=gen_noc_param_v($mpsoc);
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#generate the noc
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#generate the noc
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my $noc_v=gen_noc_v($pass_param);
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my $noc_v=gen_noc_v($mpsoc,$pass_param);
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#generate socs
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#generate socs
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my $socs_v=gen_socs_v($mpsoc,\$io_v,\$io_def_v,\$top_io,$top_ip,$sw_dir);
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my $socs_v=gen_socs_v($mpsoc,\$io_v,\$io_def_v,\$top_io,$top_ip,$sw_dir);
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#functions
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#functions
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| Line 104... |
Line 108... |
log2=log2+1;
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log2=log2+1;
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end
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end
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end
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end
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endfunction // log2
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endfunction // log2
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function integer CORE_NUM;
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input integer x,y;
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begin
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CORE_NUM = ((y * NX) + x);
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end
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endfunction
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localparam Fw = 2+V+Fpay,
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NC = (TOPOLOGY=="RING" || TOPOLOGY=="LINE" )? NX : NX*NY, //number of cores
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Xw = log2(NX),
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Yw = log2(NY) ,
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Cw = (C>1)? log2(C): 1,
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NCw = log2(NC),
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NCV = NC * V,
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NCFw = NC * Fw;
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';
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';
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return $p;
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return $p;
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| Line 134... |
Line 125... |
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sub gen_socs_param{
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sub gen_socs_param{
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my $mpsoc=shift;
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my $mpsoc=shift;
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my $socs_param="
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my $socs_param="
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//SOC parameters\n";
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//SOC parameters\n";
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my $nx= $mpsoc->object_get_attribute('noc_param',"NX");
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my ($NE, $NR, $RAw, $EAw, $Fw) = get_topology_info($mpsoc);
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my $ny= $mpsoc->object_get_attribute('noc_param',"NY");
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my $processors_en=0;
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my $processors_en=0;
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for (my $y=0;$y<$ny;$y++){
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for (my $tile=0;$tile<$NE;$tile++){
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for (my $x=0; $x<$nx;$x++){
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my $tile=($nx*$y)+ $x;
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my ($soc_name,$n,$soc_num)=$mpsoc->mpsoc_get_tile_soc_name($tile);
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my ($soc_name,$n,$soc_num)=$mpsoc->mpsoc_get_tile_soc_name($tile);
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if(defined $soc_name) {
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if(defined $soc_name) {
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my $param= gen_soc_param($mpsoc,$soc_name,$soc_num,$tile);
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my $param= gen_soc_param($mpsoc,$soc_name,$soc_num,$tile);
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add_text_to_string(\$socs_param,$param);
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add_text_to_string(\$socs_param,$param);
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}
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}
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}}#x&y
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}#$tile
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$socs_param="$socs_param \n";
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$socs_param="$socs_param \n";
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return $socs_param;
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return $socs_param;
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}
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}
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sub gen_soc_param {
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sub gen_soc_param {
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my ($mpsoc,$soc_name,$soc_num,$tile)=@_;
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my ($mpsoc,$soc_name,$soc_num,$tile)=@_;
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| Line 269... |
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sub gen_noc_v{
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sub gen_noc_v{
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my $pass_param = shift;
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my ($mpsoc,$pass_param) = @_;
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my ($NE, $NR, $RAw, $EAw, $Fw) = get_topology_info($mpsoc);
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my $noc = read_verilog_file("../src_noc/noc.v");
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my $noc = read_verilog_file("../src_noc/noc.v");
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my @noc_param=$noc->get_modules_parameters_not_local_order('noc');
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my @noc_param=$noc->get_modules_parameters_not_local_order('noc');
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my $noc_v='
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my $noc_v="
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localparam
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NE = $NE,
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NR = $NR,
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RAw = $RAw,
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EAw = $EAw,
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Fw = $Fw,
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NEFw = NE * Fw,
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NEV = NE * V;
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//NoC ports
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//NoC ports
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wire [Fw-1 : 0] ni_flit_out [NC-1 :0];
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// connection to NI modules
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wire [NC-1 : 0] ni_flit_out_wr;
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wire [Fw-1 : 0] ni_flit_out [NE-1 :0];
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wire [V-1 : 0] ni_credit_in [NC-1 :0];
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wire [NE-1 : 0] ni_flit_out_wr;
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wire [Fw-1 : 0] ni_flit_in [NC-1 :0];
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wire [V-1 : 0] ni_credit_in [NE-1 :0];
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wire [NC-1 : 0] ni_flit_in_wr;
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wire [Fw-1 : 0] ni_flit_in [NE-1 :0];
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wire [V-1 : 0] ni_credit_out [NC-1 :0];
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wire [NE-1 : 0] ni_flit_in_wr;
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wire [NCFw-1 : 0] flit_out_all;
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wire [V-1 : 0] ni_credit_out [NE-1 :0];
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wire [NC-1 : 0] flit_out_wr_all;
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wire [NCV-1 : 0] credit_in_all;
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//connection wire to NoC
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wire [NCFw-1 : 0] flit_in_all;
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wire [NEFw-1 : 0] flit_out_all;
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wire [NC-1 : 0] flit_in_wr_all;
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wire [NE-1 : 0] flit_out_wr_all;
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wire [NCV-1 : 0] credit_out_all;
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wire [NEV-1 : 0] credit_in_all;
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wire [NEFw-1 : 0] flit_in_all;
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wire [NE-1 : 0] flit_in_wr_all;
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wire [NEV-1 : 0] credit_out_all;
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wire noc_clk,noc_reset;
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wire noc_clk,noc_reset;
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";
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';
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$noc_v="$noc_v
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$noc_v="$noc_v
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//NoC\n \tnoc #(\n";
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//NoC\n \tnoc #(\n";
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| Line 337... |
Line 338... |
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add_text_to_string(\$noc_v,'
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add_text_to_string(\$noc_v,'
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//NoC port assignment
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//NoC port assignment
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genvar x,y;
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genvar IP_NUM;
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generate
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generate
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for (x=0; x<NX; x=x+1) begin :x_loop1
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for (IP_NUM=0; IP_NUM<NE; IP_NUM=IP_NUM+1) begin :endp
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for (y=0; y<NY; y=y+1) begin: y_loop1
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localparam IP_NUM = ((y * NX) + x);
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assign ni_flit_in [IP_NUM] = flit_out_all [(IP_NUM+1)*Fw-1 : IP_NUM*Fw];
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assign ni_flit_in [IP_NUM] = flit_out_all [(IP_NUM+1)*Fw-1 : IP_NUM*Fw];
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assign ni_flit_in_wr [IP_NUM] = flit_out_wr_all [IP_NUM];
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assign ni_flit_in_wr [IP_NUM] = flit_out_wr_all [IP_NUM];
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assign credit_in_all [(IP_NUM+1)*V-1 : IP_NUM*V] = ni_credit_out [IP_NUM];
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assign credit_in_all [(IP_NUM+1)*V-1 : IP_NUM*V] = ni_credit_out [IP_NUM];
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assign flit_in_all [(IP_NUM+1)*Fw-1 : IP_NUM*Fw] = ni_flit_out [IP_NUM];
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assign flit_in_all [(IP_NUM+1)*Fw-1 : IP_NUM*Fw] = ni_flit_out [IP_NUM];
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assign flit_in_wr_all [IP_NUM] = ni_flit_out_wr [IP_NUM];
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assign flit_in_wr_all [IP_NUM] = ni_flit_out_wr [IP_NUM];
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assign ni_credit_in [IP_NUM] = credit_out_all [(IP_NUM+1)*V-1 : IP_NUM*V];
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assign ni_credit_in [IP_NUM] = credit_out_all [(IP_NUM+1)*V-1 : IP_NUM*V];
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end
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end
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end
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endgenerate
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endgenerate
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'
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'
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);
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);
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return $noc_v;
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return $noc_v;
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}
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}
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sub gen_socs_v{
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sub gen_socs_v{
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my ($mpsoc,$io_v_ref,$io_def_v,$top_io_ref,$top_ip,$sw_dir)=@_;
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my ($mpsoc,$io_v_ref,$io_def_v,$top_io_ref,$top_ip,$sw_dir)=@_;
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#generate loop
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# my $socs_v='
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# genvar x,y;
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#
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# generate
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# for (x=0; x<NX; x=x+1) begin :x_loop1
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# for (y=0; y<NY; y=y+1) begin: y_loop1
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# localparam IP_NUM = CORE_NUM(x,y);' ;
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# my @socs= $mpsoc->mpsoc_get_soc_list();
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# foreach my $soc (@socs){
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# #tile num condition
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# my @tiles= $mpsoc->mpsoc_get_soc_tiles_num($soc);
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# if(scalar @tiles>0){
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# my $condition="\n\t\tif(";
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# my $s=compress_nums( @tiles);
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# my @sep=split(',',$s);
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# my $i=0;
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# foreach my $p (@sep){
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# my @range=split(':',$p);
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# my $tt;
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# if($i==0){
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# $tt= (scalar @range>1)? "(IP_NUM>=$range[0] && IP_NUM<=$range[1])":"(IP_NUM==$range[0])" ;
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# }else{
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# }
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# add_text_to_string(\$condition,$tt);
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# $i=1;
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# }
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# add_text_to_string(\$condition,") begin :${soc}_if\n ");
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# #soc instance
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# my $soc_v= gen_soc_v($mpsoc,$soc);
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#
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# add_text_to_string(\$socs_v,$condition );
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# add_text_to_string(\$socs_v,$soc_v);
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# add_text_to_string(\$socs_v,"\t\tend // ${soc}_if \n");
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# }#scalar @tile
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# } #froeach soc
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my $socs_v;
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my $socs_v;
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my ($NE, $NR, $RAw, $EAw, $EYw)= get_topology_info ($mpsoc);
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my $nx= $mpsoc->object_get_attribute('noc_param',"NX");
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my $ny= $mpsoc->object_get_attribute('noc_param',"NY");
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my $processors_en=0;
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my $processors_en=0;
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for (my $y=0;$y<$ny;$y++){
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for (my $id=0;$id<$NE;$id++){
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for (my $x=0; $x<$nx;$x++){
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my ($soc_name,$n,$soc_num)=$mpsoc->mpsoc_get_tile_soc_name($id);
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my $tile_num=($nx*$y)+ $x;
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my ($soc_name,$n,$soc_num)=$mpsoc->mpsoc_get_tile_soc_name($tile_num);
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if(defined $soc_name) {
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if(defined $soc_name) {
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my ($soc_v,$en)= gen_soc_v($mpsoc,$soc_name,$id,$soc_num,$io_v_ref,$io_def_v,$top_io_ref,$top_ip,$sw_dir);
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my ($soc_v,$en)= gen_soc_v($mpsoc,$soc_name,$tile_num,$x,$y,$soc_num,$io_v_ref,$io_def_v,$top_io_ref,$top_ip,$sw_dir);
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add_text_to_string(\$socs_v,$soc_v);
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add_text_to_string(\$socs_v,$soc_v);
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$processors_en|=$en;
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$processors_en|=$en;
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}else{
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}else{
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#this tile is not connected to any ip. the noc input ports will be connected to ground
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#this tile is not connected to any ip. the noc input ports will be connected to ground
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my $soc_v="\n\n // Tile:$tile_num (x=$x,y=$y) is not assigned to any ip\n";
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my $soc_v="\n\n // Tile:$id is not assigned to any ip\n";
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$soc_v="$soc_v
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$soc_v="$soc_v
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assign ni_credit_out[$tile_num]={V{1'b0}};
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assign ni_credit_out[$id]={V{1'b0}};
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assign ni_flit_out[$tile_num]={Fw{1'b0}};
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assign ni_flit_out[$id]={Fw{1'b0}};
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assign ni_flit_out_wr[$tile_num]=1'b0;
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assign ni_flit_out_wr[$id]=1'b0;
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";
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";
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add_text_to_string(\$socs_v,$soc_v);
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add_text_to_string(\$socs_v,$soc_v);
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}
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}
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}}
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}
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if($processors_en){
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if($processors_en){
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add_text_to_string($io_v_ref,",\n\tprocessors_en");
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add_text_to_string($io_v_ref,",\n\tprocessors_en");
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add_text_to_string($io_def_v,"\t input processors_en;");
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add_text_to_string($io_def_v,"\t input processors_en;");
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add_text_to_string($top_io_ref,",\n\t\t.processors_en(processors_en_anded_jtag)");
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add_text_to_string($top_io_ref,",\n\t\t.processors_en(processors_en_anded_jtag)");
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| Line 488... |
Line 414... |
##############
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##############
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sub gen_soc_v{
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sub gen_soc_v{
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my ($mpsoc,$soc_name,$tile_num,$x,$y,$soc_num,$io_v_ref,$io_def_v,$top_io_ref,$top_ip,$sw_path)=@_;
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my ($mpsoc,$soc_name,$tile_num,$soc_num,$io_v_ref,$io_def_v,$top_io_ref,$top_ip,$sw_path)=@_;
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my $soc_v;
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my $soc_v;
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my $processor_en=0;
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my $processor_en=0;
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my $xw= log2($mpsoc->object_get_attribute('noc_param',"NX"));
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my ($NE, $NR, $RAw, $EAw, $Fw)= get_topology_info ($mpsoc);
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my $yw= log2($mpsoc->object_get_attribute('noc_param',"NY"));
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my $e_addr=endp_addr_encoder($mpsoc,$tile_num);
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$soc_v="\n\n // Tile:$tile_num (x=$x,y=$y)\n \t$soc_name #(\n";
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my $router_num = get_connected_router_id_to_endp($mpsoc,$tile_num);
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my $r_addr=router_addr_encoder($mpsoc,$router_num);
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# Global parameter
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add_text_to_string(\$soc_v,"\t\t.CORE_ID($tile_num),\n\t\t.SW_LOC(\"$sw_path/tile$tile_num\")");
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# ni parameter
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my $top=$mpsoc->mpsoc_get_soc($soc_name);
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my @nis=get_NI_instance_list($top);
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my @noc_param=$top->top_get_parameter_list($nis[0]);
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my $inst_name=$top->top_get_def_of_instance($nis[0],'instance');
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#other parameters
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$soc_v="\n\n // Tile:$tile_num ($e_addr)\n \t$soc_name #(\n";
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my %params=$top->top_get_default_soc_param();
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foreach my $p (@noc_param){
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# Global parameter
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my $parm_next = $p;
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add_text_to_string(\$soc_v,"\t\t.CORE_ID($tile_num),\n\t\t.SW_LOC(\"$sw_path/tile$tile_num\")");
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$parm_next =~ s/${inst_name}_//;
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my $param= ",\n\t\t.$p($parm_next)";
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add_text_to_string(\$soc_v,$param);
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}
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foreach my $p (sort keys %params){
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my $parm_next= "${soc_name}_${soc_num}_$p";
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my $param= ",\n\t\t.$p($parm_next)";
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add_text_to_string(\$soc_v,$param);
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}
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add_text_to_string(\$soc_v,"\n\t)the_${soc_name}_$soc_num(\n");
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# ni parameter
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my $top=$mpsoc->mpsoc_get_soc($soc_name);
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my @nis=get_NI_instance_list($top);
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my @noc_param=$top->top_get_parameter_list($nis[0]);
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my $inst_name=$top->top_get_def_of_instance($nis[0],'instance');
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my @intfcs=$top->top_get_intfc_list();
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#other parameters
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my %params=$top->top_get_default_soc_param();
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my $i=0;
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my $dir = Cwd::getcwd();
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my $mpsoc_name=$mpsoc->object_get_attribute('mpsoc_name');
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my $target_dir = "$ENV{'PRONOC_WORK'}/MPSOC/$mpsoc_name";
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my $soc_file="$target_dir/src_verilog/tiles/$soc_name.v";
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my $vdb =read_verilog_file($soc_file);
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foreach my $p (@noc_param){
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my $parm_next = $p;
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$parm_next =~ s/${inst_name}_//;
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my $param= ",\n\t\t.$p($parm_next)";
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add_text_to_string(\$soc_v,$param);
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}
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foreach my $p (sort keys %params){
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my $parm_next= "${soc_name}_${soc_num}_$p";
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my $param= ",\n\t\t.$p($parm_next)";
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add_text_to_string(\$soc_v,$param);
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my %soc_localparam = $vdb->get_modules_parameters($soc_name);
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}
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add_text_to_string(\$soc_v,"\n\t)the_${soc_name}_$soc_num(\n");
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foreach my $intfc (@intfcs){
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my @intfcs=$top->top_get_intfc_list();
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# ni intfc
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my $i=0;
|
if( $intfc eq 'socket:ni[0]'){
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my @ports=$top->top_get_intfc_ports_list($intfc);
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foreach my $p (@ports){
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my $dir = Cwd::getcwd();
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my($inst,$range,$type,$intfc_name,$intfc_port)= $top->top_get_port($p);
|
my $mpsoc_name=$mpsoc->object_get_attribute('mpsoc_name');
|
my $q=($intfc_port eq "current_x")? "$xw\'d$x" :
|
my $target_dir = "$ENV{'PRONOC_WORK'}/MPSOC/$mpsoc_name";
|
($intfc_port eq "current_y")? "$yw\'d$y" :"ni_$intfc_port\[$tile_num\]";
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my $soc_file="$target_dir/src_verilog/tiles/$soc_name.v";
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add_text_to_string(\$soc_v,',') if ($i);
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add_text_to_string(\$soc_v,"\n\t\t.$p($q)");
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$i=1;
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my $vdb =read_verilog_file($soc_file);
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}
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my %soc_localparam = $vdb->get_modules_parameters($soc_name);
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}
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# clk source
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|
elsif( $intfc eq 'plug:clk[0]'){
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my @ports=$top->top_get_intfc_ports_list($intfc);
|
|
foreach my $p (@ports){
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my($inst,$range,$type,$intfc_name,$intfc_port)= $top->top_get_port($p);
|
|
add_text_to_string(\$soc_v,',') if ($i);
|
|
add_text_to_string(\$soc_v,"\n\t\t.$p(clk)");
|
|
$i=1;
|
|
|
|
}
|
|
}
|
|
#reset
|
|
elsif( $intfc eq 'plug:reset[0]'){
|
|
my @ports=$top->top_get_intfc_ports_list($intfc);
|
|
foreach my $p (@ports){
|
|
my($inst,$range,$type,$intfc_name,$intfc_port)= $top->top_get_port($p);
|
|
add_text_to_string(\$soc_v,',') if ($i);
|
|
add_text_to_string(\$soc_v,"\n\t\t.$p(reset)");
|
|
$i=1;
|
|
|
|
}
|
foreach my $intfc (@intfcs){
|
|
|
|
# ni intfc
|
|
if( $intfc eq 'socket:ni[0]'){
|
|
my @ports=$top->top_get_intfc_ports_list($intfc);
|
|
|
|
foreach my $p (@ports){
|
|
my($inst,$range,$type,$intfc_name,$intfc_port)= $top->top_get_port($p);
|
|
my $q= ($intfc_port eq "current_e_addr")? "$EAw\'d$e_addr" :
|
|
($intfc_port eq "current_r_addr")? "$RAw\'d$r_addr" :
|
|
"ni_$intfc_port\[$tile_num\]";
|
|
add_text_to_string(\$soc_v,',') if ($i);
|
|
add_text_to_string(\$soc_v,"\n\t\t.$p($q)");
|
|
$i=1;
|
|
|
}
|
|
#enable
|
|
elsif( $intfc eq 'plug:enable[0]'){
|
|
my @ports=$top->top_get_intfc_ports_list($intfc);
|
|
foreach my $p (@ports){
|
|
my($inst,$range,$type,$intfc_name,$intfc_port)= $top->top_get_port($p);
|
|
add_text_to_string(\$soc_v,',') if ($i);
|
|
add_text_to_string(\$soc_v,"\n\t\t.$p(processors_en)");
|
|
$processor_en=1;
|
|
$i=1;
|
|
|
|
}
|
}
|
|
}
|
|
# clk source
|
|
elsif( $intfc eq 'plug:clk[0]'){
|
|
my @ports=$top->top_get_intfc_ports_list($intfc);
|
|
foreach my $p (@ports){
|
|
my($inst,$range,$type,$intfc_name,$intfc_port)= $top->top_get_port($p);
|
|
add_text_to_string(\$soc_v,',') if ($i);
|
|
add_text_to_string(\$soc_v,"\n\t\t.$p(clk)");
|
|
$i=1;
|
|
|
|
}
|
|
}
|
|
#reset
|
|
elsif( $intfc eq 'plug:reset[0]'){
|
|
my @ports=$top->top_get_intfc_ports_list($intfc);
|
|
foreach my $p (@ports){
|
|
my($inst,$range,$type,$intfc_name,$intfc_port)= $top->top_get_port($p);
|
|
add_text_to_string(\$soc_v,',') if ($i);
|
|
add_text_to_string(\$soc_v,"\n\t\t.$p(reset)");
|
|
$i=1;
|
|
|
}
|
}
|
#RxD_sim
|
|
elsif( $intfc eq 'socket:RxD_sim[0]'){
|
|
#This interface is for simulation only donot include it in top module
|
|
my @ports=$top->top_get_intfc_ports_list($intfc);
|
|
foreach my $p (@ports){
|
|
add_text_to_string(\$soc_v,',') if ($i);
|
|
add_text_to_string(\$soc_v,"\n\t\t.$p( )");
|
|
$i=1;
|
|
}
|
|
|
|
}
|
|
|
|
else {
|
|
#other interface
|
|
my @ports=$top->top_get_intfc_ports_list($intfc);
|
|
foreach my $p (@ports){
|
|
my($inst,$range,$type,$intfc_name,$intfc_port)= $top->top_get_port($p);
|
|
my $io_port="${soc_name}_${soc_num}_${p}";
|
|
#resolve range parameter
|
|
if (defined $range ){
|
|
my @a= split (/\b/,$range);
|
|
foreach my $l (@a){
|
|
#if defined in parameter list ignore it
|
|
next if(defined $params{$l});
|
|
($range=$range)=~ s/\b$l\b/$soc_localparam{$l}/g if(defined $soc_localparam{$l});
|
|
#else s
|
|
|
|
#print "$l\n";
|
|
}
|
|
|
|
}
|
}
|
#io name
|
#enable
|
add_text_to_string($io_v_ref,",\n\t$io_port");
|
elsif( $intfc eq 'plug:enable[0]'){
|
add_text_to_string($top_io_ref,",\n\t\t.$io_port($io_port)");
|
my @ports=$top->top_get_intfc_ports_list($intfc);
|
#io definition
|
foreach my $p (@ports){
|
my $new_range = add_instantc_name_to_parameters(\%params,"${soc_name}_$soc_num",$range);
|
my($inst,$range,$type,$intfc_name,$intfc_port)= $top->top_get_port($p);
|
#my $new_range=$range;
|
add_text_to_string(\$soc_v,',') if ($i);
|
my $port_def=(length ($range)>1 )? "\t$type\t [ $new_range ] $io_port;\n": "\t$type\t\t\t$io_port;\n";
|
add_text_to_string(\$soc_v,"\n\t\t.$p(processors_en)");
|
$top_ip->top_add_port("${soc_name}_$tile_num" ,$io_port, $new_range ,$type,$intfc_name,$intfc_port);
|
$processor_en=1;
|
|
$i=1;
|
add_text_to_string($io_def_v,"$port_def");
|
|
add_text_to_string(\$soc_v,',') if ($i);
|
|
add_text_to_string(\$soc_v,"\n\t\t.$p($io_port)");
|
|
$i=1;
|
|
|
|
}
|
}
|
|
|
|
|
}
|
}
|
|
#RxD_sim
|
|
elsif( $intfc eq 'socket:RxD_sim[0]'){
|
|
#This interface is for simulation only donot include it in top module
|
|
my @ports=$top->top_get_intfc_ports_list($intfc);
|
|
foreach my $p (@ports){
|
|
add_text_to_string(\$soc_v,',') if ($i);
|
|
add_text_to_string(\$soc_v,"\n\t\t.$p( )");
|
|
$i=1;
|
|
}
|
|
|
|
}
|
|
|
}
|
else {
|
|
#other interface
|
|
my @ports=$top->top_get_intfc_ports_list($intfc);
|
|
foreach my $p (@ports){
|
|
my($inst,$range,$type,$intfc_name,$intfc_port)= $top->top_get_port($p);
|
|
my $io_port="${soc_name}_${soc_num}_${p}";
|
|
#resolve range parameter
|
|
if (defined $range ){
|
|
my @a= split (/\b/,$range);
|
|
foreach my $l (@a){
|
|
#if defined in parameter list ignore it
|
|
next if(defined $params{$l});
|
|
($range=$range)=~ s/\b$l\b/$soc_localparam{$l}/g if(defined $soc_localparam{$l});
|
|
#else s
|
|
|
add_text_to_string(\$soc_v,"\n\t);\n");
|
#print "$l\n";
|
|
}
|
|
|
|
}
|
|
#io name
|
|
add_text_to_string($io_v_ref,",\n\t$io_port");
|
|
add_text_to_string($top_io_ref,",\n\t\t.$io_port($io_port)");
|
|
#io definition
|
|
my $new_range = add_instantc_name_to_parameters(\%params,"${soc_name}_$soc_num",$range);
|
|
#my $new_range=$range;
|
|
my $port_def=(length ($range)>1 )? "\t$type\t [ $new_range ] $io_port;\n": "\t$type\t\t\t$io_port;\n";
|
|
$top_ip->top_add_port("${soc_name}_$tile_num" ,$io_port, $new_range ,$type,$intfc_name,$intfc_port);
|
|
|
|
add_text_to_string($io_def_v,"$port_def");
|
|
add_text_to_string(\$soc_v,',') if ($i);
|
|
add_text_to_string(\$soc_v,"\n\t\t.$p($io_port)");
|
|
$i=1;
|
|
|
|
}
|
|
|
|
|
|
}
|
|
|
|
|
|
}
|
|
|
|
add_text_to_string(\$soc_v,"\n\t);\n");
|
|
|
|
|
return ($soc_v,$processor_en);
|
|
|
|
}
|
|
|
|
|
|
sub log2{
|
|
my $num=shift;
|
|
my $log=0;
|
|
while( (1<< $log) < $num) {
|
|
$log++;
|
|
}
|
|
return $log;
|
|
}
|
|
|
|
|
|
|
|
sub gen_emulate_top_v{
|
|
my $emulate=shift;
|
|
my ($localparam, $pass_param)=gen_noc_param_v( $emulate);
|
return ($soc_v,$processor_en);
|
my $top_v="
|
|
|
}
|
|
|
|
|
|
sub log2{
|
|
my $num=shift;
|
|
my $log=0;
|
|
while( (1<< $log) < $num) {
|
|
$log++;
|
|
}
|
|
return $log;
|
|
}
|
|
|
|
|
|
|
|
sub gen_emulate_top_v{
|
|
my $emulate=shift;
|
|
my ($localparam, $pass_param)=gen_noc_param_v( $emulate);
|
|
my $top_v="
|
|
|
module emulator_top (
|
module emulator_top (
|
output [0:0]LEDR,
|
output [0:0]LEDR,
|
output [0:0]LEDG,
|
output [0:0]LEDG,
|
input [0:0]KEY,
|
input [0:0]KEY,
|
| Line 761... |
Line 696... |
|
|
|
|
endmodule
|
endmodule
|
|
|
|
|
";
|
";
|
return $top_v;
|
return $top_v;
|
|
|
|
|
|
|
|
|
}
|
}
|
|
|
|
|
1
|
|
|
|
No newline at end of file
|
No newline at end of file
|
|
1
|
|
|
No newline at end of file
|
No newline at end of file
|
