Line 6... |
Line 6... |
use ip;
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use ip;
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use interface;
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use interface;
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use POSIX 'strtol';
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use POSIX 'strtol';
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use File::Path;
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use File::Path;
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use File::Find;
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#use File::Find;
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use File::Copy;
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use File::Copy;
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use File::Copy::Recursive qw(dircopy);
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use File::Copy::Recursive qw(dircopy);
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use Cwd 'abs_path';
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use Cwd 'abs_path';
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Line 164... |
Line 164... |
$value=~ s/\D//g;
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$value=~ s/\D//g;
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$min=~ s/\D//g;
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$min=~ s/\D//g;
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$max=~ s/\D//g;
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$max=~ s/\D//g;
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$step=~ s/\D//g;
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$step=~ s/\D//g;
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my $spin=gen_spin($min,$max,$step);
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my $spin=gen_spin($min,$max,$step);
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$spin->set_value($value);
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if(defined $value) {$spin->set_value($value);}
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else {$spin->set_value($min);}
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$table->attach ($spin, 3, 4, $row, $row+1,'expand','shrink',2,2);
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$table->attach ($spin, 3, 4, $row, $row+1,'expand','shrink',2,2);
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$spin-> signal_connect("value_changed" => sub{ $new_param_value{$p}=$spin->get_value_as_int(); });
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$spin-> signal_connect("value_changed" => sub{ $new_param_value{$p}=$spin->get_value_as_int(); });
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# $box=def_label_spin_help_box ($param,$info, $value,$min,$max,$step, 2);
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# $box=def_label_spin_help_box ($param,$info, $value,$min,$max,$step, 2);
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}
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}
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Line 851... |
Line 852... |
################
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################
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# generate_soc
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# generate_soc
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#################
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#################
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sub generate_soc{
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sub generate_soc{
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my ($soc,$info)=@_;
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my ($soc,$info,$target_dir,$hw_path,$sw_path,$gen_top,$gen_hw_lib)=@_;
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my $name=$soc->object_get_attribute('soc_name');
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my $name=$soc->object_get_attribute('soc_name');
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if (length($name)>0){
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my @tmp=split('_',$name);
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if ( $tmp[-1] =~ /^[0-9]+$/ ){
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message_dialog("The soc name must not end with '_number'!");
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return 0;
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}
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my ($file_v,$top_v,$readme)=soc_generate_verilog($soc);
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my ($file_v,$top_v,$readme,$prog)=soc_generate_verilog($soc);
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# Write object file
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# Write object file
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open(FILE, ">lib/soc/$name.SOC") || die "Can not open: $!";
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open(FILE, ">lib/soc/$name.SOC") || die "Can not open: $!";
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print FILE perl_file_header("$name.SOC");
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print FILE perl_file_header("$name.SOC");
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print FILE Data::Dumper->Dump([\%$soc],[$name]);
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print FILE Data::Dumper->Dump([\%$soc],['soc']);
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close(FILE) || die "Error closing file: $!";
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close(FILE) || die "Error closing file: $!";
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# Write verilog file
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# Write verilog file
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open(FILE, ">lib/verilog/$name.v") || die "Can not open: $!";
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open(FILE, ">lib/verilog/$name.v") || die "Can not open: $!";
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print FILE $file_v;
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print FILE $file_v;
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close(FILE) || die "Error closing file: $!";
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close(FILE) || die "Error closing file: $!";
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# Write Top module file
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# Write Top module file
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if($gen_top){
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my $l=autogen_warning().get_license_header("${name}_top.v");
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my $l=autogen_warning().get_license_header("${name}_top.v");
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open(FILE, ">lib/verilog/${name}_top.v") || die "Can not open: $!";
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open(FILE, ">lib/verilog/${name}_top.v") || die "Can not open: $!";
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print FILE "$l\n$top_v";
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print FILE "$l\n$top_v";
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close(FILE) || die "Error closing file: $!";
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close(FILE) || die "Error closing file: $!";
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}
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# Write readme file
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# Write readme file
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open(FILE, ">lib/verilog/README") || die "Can not open: $!";
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open(FILE, ">lib/verilog/README") || die "Can not open: $!";
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print FILE $readme;
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print FILE $readme;
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close(FILE) || die "Error closing file: $!";
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close(FILE) || die "Error closing file: $!";
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# copy all files in project work directory
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# Write memory prog file
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open(FILE, ">lib/verilog/write_memory.sh") || die "Can not open: $!";
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print FILE $prog;
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close(FILE) || die "Error closing file: $!";
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my $dir = Cwd::getcwd();
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my $dir = Cwd::getcwd();
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#make target dir
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my $project_dir = abs_path("$dir/../../");
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my $project_dir = abs_path("$dir/../../");
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my $target_dir = "$project_dir/mpsoc_work/SOC/$name";
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if($gen_hw_lib){
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mkpath("$target_dir/src_verilog/lib/",1,01777);
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mkpath("$target_dir/sw",1,01777);
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#make target dir
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my $hw_lib="$hw_path/lib";
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mkpath("$hw_lib/",1,01777);
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mkpath("$sw_path/",1,01777);
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#copy hdl codes in src_verilog
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#copy hdl codes in src_verilog
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my ($file_ref,$warnings)= get_all_files_list($soc,"hdl_files");
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my ($file_ref,$warnings)= get_all_files_list($soc,"hdl_files");
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copy_file_and_folders($file_ref,$project_dir,"$target_dir/src_verilog/lib");
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copy_file_and_folders($file_ref,$project_dir,$hw_lib);
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show_info(\$info,$warnings) if(defined $warnings);
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show_info(\$info,$warnings) if(defined $warnings);
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#copy jtag control files
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#copy jtag control files
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my @jtags=(("/mpsoc/src_peripheral/jtag/jtag_wb"),("jtag"));
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my @jtags=(("/mpsoc/src_peripheral/jtag/jtag_wb"),("jtag"));
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copy_file_and_folders(\@jtags,$project_dir,"$target_dir/src_verilog/lib");
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copy_file_and_folders(\@jtags,$project_dir,$hw_lib);
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move ("$dir/lib/verilog/$name.v","$hw_path/");
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#my @pathes=("$dir/../src_peripheral","$dir/../src_noc","$dir/../src_processor");
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move ("$dir/lib/verilog/${name}_top.v","$hw_path/");
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#foreach my $p(@pathes){
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move ("$dir/lib/verilog/README" ,"$sw_path/");
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# find(
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move ("$dir/lib/verilog/write_memory.sh" ,"$sw_path/");
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# sub {
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}
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# return unless ( -f $_ );
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# $_ =~ /\.v$/ && copy( $File::Find::name, "$target_dir/src_verilog/lib/" );
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# },
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# $p
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# );
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#}
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move ("$dir/lib/verilog/$name.v","$target_dir/src_verilog/");
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move ("$dir/lib/verilog/${name}_top.v","$target_dir/src_verilog/");
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move ("$dir/lib/verilog/README" ,"$target_dir/sw/");
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# Copy Software files
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# Copy Software files
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($file_ref,$warnings)= get_all_files_list($soc,"sw_files");
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my ($file_ref,$warnings)= get_all_files_list($soc,"sw_files");
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copy_file_and_folders($file_ref,$project_dir,"$target_dir/sw");
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copy_file_and_folders($file_ref,$project_dir,$sw_path);
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# Write system.h and Software gen files
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# Write system.h and Software gen files
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generate_header_file($soc,$project_dir,$target_dir,$dir);
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generate_header_file($soc,$project_dir,$sw_path,$dir);
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# Write main.c file if not exist
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# Write main.c file if not exist
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my $n="$target_dir/sw/main.c";
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my $n="$sw_path/main.c";
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if (!(-f "$n")) {
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if (!(-f "$n")) {
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# Write main.c
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# Write main.c
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open(FILE, ">$n") || die "Can not open: $!";
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open(FILE, ">$n") || die "Can not open: $!";
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print FILE main_c_template($name);
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print FILE main_c_template($name);
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close(FILE) || die "Error closing file: $!";
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close(FILE) || die "Error closing file: $!";
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Line 945... |
Line 938... |
}
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}
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message_dialog("SoC \"$name\" has been created successfully at $target_dir/ " );
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exec($^X, $0, @ARGV);# reset ProNoC to apply changes
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}else {
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message_dialog("Please define the SoC name!");
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}
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return 1;
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}
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}
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sub main_c_template{
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sub main_c_template{
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my $hdr=shift;
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my $hdr=shift;
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Line 1417... |
Line 1403... |
my $infc = interface->interface_new();
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my $infc = interface->interface_new();
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my $ip = ip->lib_new ();
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my $ip = ip->lib_new ();
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my $soc = soc->soc_new();
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my $soc = soc->soc_new();
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set_gui_status($soc,"ideal",0);
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set_gui_status($soc,"ideal",0);
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#my $soc= eval { do 'lib/soc/soc.SOC' };
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#my $soc= eval { do 'lib/soc/soc.SOC' };
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#message_dialog("$ENV{'PRONOC_WORK'}\n");
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# main window
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# main window
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#my $window = def_win_size(1000,800,"Top");
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#my $window = def_win_size(1000,800,"Top");
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# The main table containg the lib tree, selected modules and info section
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# The main table containg the lib tree, selected modules and info section
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my $main_table = Gtk2::Table->new (20, 12, FALSE);
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my $main_table = Gtk2::Table->new (20, 12, FALSE);
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Line 1469... |
Line 1455... |
$main_table->attach_defaults ($entrybox,3, 7, 19,20);
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$main_table->attach_defaults ($entrybox,3, 7, 19,20);
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$main_table->attach ($wb, 7, 10, 19,20,'expand','shrink',2,2);
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$main_table->attach ($wb, 7, 10, 19,20,'expand','shrink',2,2);
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$main_table->attach ($generate, 10, 12, 19,20,'expand','shrink',2,2);
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$main_table->attach ($generate, 10, 12, 19,20,'expand','shrink',2,2);
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#check soc status every 0.5 second. referesh device table if there is any changes
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|
Glib::Timeout->add (100, sub{
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|
my ($state,$timeout)= get_gui_status($soc);
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|
|
|
if ($timeout>0){
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|
$timeout--;
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set_gui_status($soc,$state,$timeout);
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$generate-> signal_connect("clicked" => sub{
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my $name=$soc->object_get_attribute('soc_name');
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|
|
if (length($name)==0){
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message_dialog("Please define the SoC name!");
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|
return ;
|
}
|
}
|
elsif( $state ne "ideal" ){
|
|
$refresh_dev_win->clicked;
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my $saved_name=$soc->object_get_attribute('soc_name',undef);
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if(defined $saved_name) {$entry->set_text($saved_name);}
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set_gui_status($soc,"ideal",0);
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|
}
|
|
return TRUE;
|
|
|
|
} );
|
|
|
|
|
my @tmp=split('_',$name);
|
|
if ( $tmp[-1] =~ /^[0-9]+$/ ){
|
|
message_dialog("The soc name must not end with '_number'!");
|
|
return ;
|
|
}
|
|
if ( $name =~ /\W+/ ){
|
|
message_dialog('The soc name must not contain any non-word character:("./\()\':,.;<>~!@#$%^&*|+=[]{}`~?-")!")');
|
|
return ;
|
|
}
|
|
|
$generate-> signal_connect("clicked" => sub{
|
my $target_dir = "$ENV{'PRONOC_WORK'}/SOC/$name";
|
generate_soc($soc,$info);
|
my $hw_dir = "$target_dir/src_verilog";
|
$refresh_dev_win->clicked;
|
my $sw_path = "$target_dir/sw";
|
|
|
|
$soc->object_add_attribute('global_param','CORE_ID',0);
|
|
generate_soc($soc,$info,$target_dir,$hw_dir,$sw_path,1,1);
|
|
message_dialog("SoC \"$name\" has been created successfully at $target_dir/ " );
|
|
exec($^X, $0, @ARGV);# reset ProNoC to apply changes
|
|
|
});
|
});
|
|
|
$wb-> signal_connect("clicked" => sub{
|
$wb-> signal_connect("clicked" => sub{
|
wb_address_setting($soc);
|
wb_address_setting($soc);
|
Line 1509... |
Line 1502... |
|
|
my $sc_win = new Gtk2::ScrolledWindow (undef, undef);
|
my $sc_win = new Gtk2::ScrolledWindow (undef, undef);
|
$sc_win->set_policy( "automatic", "automatic" );
|
$sc_win->set_policy( "automatic", "automatic" );
|
$sc_win->add_with_viewport($main_table);
|
$sc_win->add_with_viewport($main_table);
|
|
|
|
|
|
|
|
#check soc status every 0.5 second. referesh device table if there is any changes
|
|
Glib::Timeout->add (100, sub{
|
|
my ($state,$timeout)= get_gui_status($soc);
|
|
|
|
if ($timeout>0){
|
|
$timeout--;
|
|
set_gui_status($soc,$state,$timeout);
|
|
|
|
}
|
|
elsif( $state ne "ideal" ){
|
|
$refresh_dev_win->clicked;
|
|
my $saved_name=$soc->object_get_attribute('soc_name',undef);
|
|
if(defined $saved_name) {$entry->set_text($saved_name);}
|
|
set_gui_status($soc,"ideal",0);
|
|
}
|
|
return TRUE;
|
|
|
|
} );
|
|
|
|
|
|
|
return $sc_win;
|
return $sc_win;
|
#return $main_table;
|
#return $main_table;
|
|
|
|
|
}
|
}
|