URL https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk

Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [src_c/] [jtag/] [test_rtl/] [jtag_ram_test/] [src_verilog/] [lib/] [wishbone_bus.v] - Diff between revs 38 and 48

Rev 38	Rev 48
Line 477...	Line 477...
`assign one_hot_arb_req = request & {M{~comreq}};`	`assign one_hot_arb_req = request & {M{~comreq}};`
`assign grant = grant_registered;`	`assign grant = grant_registered;`

`assign comreq = \|(grant & request);`	`assign comreq = \|(grant & request);`

	`ifdef SYNC_RESET_MODE
	`always @ (posedge clk )begin`
	`else
`always @ (posedge clk or posedge reset) begin`	`always @ (posedge clk or posedge reset) begin`
	`endif

`if (reset) begin`	`if (reset) begin`
`grant_registered <= {M{1'b0}};`	`grant_registered <= {M{1'b0}};`
`end else begin`	`end else begin`
`if(~comreq) grant_registered <= one_hot_arb_grant;`	`if(~comreq) grant_registered <= one_hot_arb_grant;`
`end`	`end`