URL https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk

Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [src_processor/] [lm32/] [sw/] [Makefile] - Diff between revs 21 and 25

Rev 21	Rev 25
Line 1...	Line 1...
`TOOLCHAIN=$(PRONOC_WORK)/toolchain/lm32`	`TOOLCHAIN=$(PRONOC_WORK)/toolchain/lm32`
`IHEX2MIF =$(PRONOC_WORK)/toolchain/ihex2mif/ihex2mif`	`IHEX2MIF =$(PRONOC_WORK)/toolchain/bin/ihex2mif`
	`IHEX2BIN =$(PRONOC_WORK)/toolchain/bin/ihex2bin`


`#SREC2VRAM ?= ../../../toolchain/lm32/srec2vram/srec2vram`	`#SREC2VRAM ?= ../../../toolchain/lm32/srec2vram/srec2vram`

`RAMSIZE=3FFF`	`RAMSIZE=3FFF`
Line 49...	Line 50...
`#$(LM32_OBJCOPY) $(SEGMENTS) -O srec image image.srec`	`#$(LM32_OBJCOPY) $(SEGMENTS) -O srec image image.srec`
`$(LM32_OBJCOPY) $(SEGMENTS) -O ihex image image.ihex`	`$(LM32_OBJCOPY) $(SEGMENTS) -O ihex image image.ihex`

`$(VRAMFILE): image.srec`	`$(VRAMFILE): image.srec`
`#$(SREC2VRAM) image.srec 0x40000000 0x1000 > $(VRAMFILE)`	`#$(SREC2VRAM) image.srec 0x40000000 0x1000 > $(VRAMFILE)`
`$(IHEX2MIF) -f image.ihex -e $(RAMSIZE) -o ram00.mif`	`$(IHEX2MIF) -f image.ihex -e $(RAMSIZE) -o ram0.mif`
	`$(IHEX2BIN) -i image.ihex -o ram0.bin`

`clean:`	`clean:`
`rm -f image.ihex image image.lst image.bin image.srec image.map image.ram image.hex .o .d`	`rm -f image.ihex image image.lst image.bin image.srec image.map image.ram image.hex .o .d`

`DEPS := $(wildcard *.d)`	`DEPS := $(wildcard *.d)`