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https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk
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Rev 45 |
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IHEX2BIN =$(PRONOC_WORK)/toolchain/bin/ihex2bin
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IHEX2BIN =$(PRONOC_WORK)/toolchain/bin/ihex2bin
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BIN2HEX =$(PRONOC_WORK)/toolchain/bin/bin2str
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BIN2HEX =$(PRONOC_WORK)/toolchain/bin/bin2str
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#SREC2VRAM ?= ../../../toolchain/lm32/srec2vram/srec2vram
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#SREC2VRAM ?= ../../../toolchain/lm32/srec2vram/srec2vram
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RAMSIZE=3FFF
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#RAMSIZE=3FFF
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#CPU_FLAGS=-mbarrel-shift-enabled -mmultiply-enabled -msign-extend-enabled -mdivide-enabled
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#CPU_FLAGS=-mbarrel-shift-enabled -mmultiply-enabled -msign-extend-enabled -mdivide-enabled
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CPU_FLAGS=-mbarrel-shift-enabled -mmultiply-enabled
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CPU_FLAGS=-mbarrel-shift-enabled -mmultiply-enabled
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LM32_CC=${TOOLCHAIN}/bin/lm32-elf-gcc
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LM32_CC=${TOOLCHAIN}/bin/lm32-elf-gcc
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LM32_LD=${TOOLCHAIN}/bin/lm32-elf-ld
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LM32_LD=${TOOLCHAIN}/bin/lm32-elf-ld
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$(VRAMFILE): image.srec
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$(VRAMFILE): image.srec
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#$(SREC2VRAM) image.srec 0x40000000 0x1000 > $(VRAMFILE)
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#$(SREC2VRAM) image.srec 0x40000000 0x1000 > $(VRAMFILE)
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rm -Rf ./RAM
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rm -Rf ./RAM
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mkdir -p ./RAM
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mkdir -p ./RAM
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$(IHEX2MIF) -f image.ihex -e $(RAMSIZE) -o RAM/ram0.mif
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#$(IHEX2MIF) -f image.ihex -e $(RAMSIZE) -o RAM/ram0.mif
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$(IHEX2MIF) -f image.ihex -o RAM/ram0.mif
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$(IHEX2BIN) -i image.ihex -o RAM/ram0.bin
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$(IHEX2BIN) -i image.ihex -o RAM/ram0.bin
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$(BIN2HEX) -f RAM/ram0.bin -h
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$(BIN2HEX) -f RAM/ram0.bin -h
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clean:
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clean:
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rm -f image.ihex image image.lst image.bin image.srec image.map image.ram image.hex *.o *.d
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rm -f image.ihex image image.lst image.bin image.srec image.map image.ram image.hex *.o *.d
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