URL https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk

Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [src_processor/] [mor1kx-3.1/] [sw/] [mor1kx/] [mor1kx-utils.c] - Diff between revs 38 and 48

Rev 38	Rev 48
Line 1...	Line 1...
`#include "spr-defs.h"`	`#include "spr-defs.h"`
`#include "board.h" // For timer rate (IN_CLK, TICKS_PER_SEC)`	`#include "board.h" // For timer rate (IN_CLK, TICKS_PER_SEC)`
`#include <or1k-support-defs.h>`	`#include <or1k-support-defs.h>`

	`extern int main();`

`/* For writing into SPR. */`	`/* For writing into SPR. */`
`void`	`void`
`mtspr(unsigned long spr, unsigned long value)`	`mtspr(unsigned long spr, unsigned long value)`
`{`	`{`
`asm("l.mtspr\t\t%0,%1,0": : "r" (spr), "r" (value));`	`asm("l.mtspr\t\t%0,%1,0": : "r" (spr), "r" (value));`
Line 110...	Line 113...
`// gone at least enough`	`// gone at least enough`
`while(ttcr > (mfspr(SPR_TTCR) & SPR_TTCR_PERIOD));`	`while(ttcr > (mfspr(SPR_TTCR) & SPR_TTCR_PERIOD));`

`}`	`}`

	`extern char _erodata, _sdata, _edata, _bstart, _bend;`

	`void __main (void){ //initial_global_data`

	`char *src = &_erodata; //start of Data section in Rom`
	`char *dst = &_sdata;`

	`/* ROM has data at end of rodata; copy it. */`
	`while (dst < &_edata) {`
	`dst++ = src++;`
	`}`
	`main(); //call the main function`
	`}`

`No newline at end of file`	`No newline at end of file`