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https://opencores.org/ocsvn/ao68000/ao68000/trunk
[/] [ao68000/] [trunk/] [Makefile] - Diff between revs 17 and 18
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| Rev 17 |
Rev 18 |
| Line 83... |
Line 83... |
cd ./tmp/compare_with_winuae/verilog && ln -s -f $(QUARTUS_ROOTDIR)/eda/sim_lib/220model.v lpm_mult.v
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cd ./tmp/compare_with_winuae/verilog && ln -s -f $(QUARTUS_ROOTDIR)/eda/sim_lib/220model.v lpm_mult.v
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cd ./tmp/compare_with_winuae/verilog && ln -s -f $(QUARTUS_ROOTDIR)/eda/sim_lib/220model.v lpm_divide.v
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cd ./tmp/compare_with_winuae/verilog && ln -s -f $(QUARTUS_ROOTDIR)/eda/sim_lib/220model.v lpm_divide.v
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cd ./tmp/compare_with_winuae/verilog && iverilog -y. -y./../../../rtl -y./../../../tests/compare_with_winuae/verilog -o tb_ao68000 ./../../../tests/compare_with_winuae/verilog/tb_ao68000.v
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cd ./tmp/compare_with_winuae/verilog && iverilog -y. -y./../../../rtl -y./../../../tests/compare_with_winuae/verilog -o tb_ao68000 ./../../../tests/compare_with_winuae/verilog/tb_ao68000.v
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cp ./rtl/ao68000_microcode.mif ./tmp/compare_with_winuae/verilog
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cp ./rtl/ao68000_microcode.mif ./tmp/compare_with_winuae/verilog
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START_IR_DEC := 33024
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START_IR_DEC := 24828
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END_IR_DEC := 33040
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END_IR_DEC := 24836
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TERM_PROGRAM := xterm
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TERM_PROGRAM := xterm
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COUNT := 4
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COUNT := 4
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COUNT_LIST := $(wordlist 1,$(COUNT),0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19)
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COUNT_LIST := $(wordlist 1,$(COUNT),0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19)
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STEP := `expr \( $(END_IR_DEC) - $(START_IR_DEC) \) / $(COUNT)`
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STEP := `expr \( $(END_IR_DEC) - $(START_IR_DEC) \) / $(COUNT)`
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