Line 139... |
Line 139... |
<ul>
|
<ul>
|
<li>blocked output, high when that the processor is blocked after encountering a double bus error. The only way to leave this block state is by reseting the <a class="el" href="classao68000.html" title="ao68000 top level module.">ao68000</a> by the asynchronous reset input signal.</li>
|
<li>blocked output, high when that the processor is blocked after encountering a double bus error. The only way to leave this block state is by reseting the <a class="el" href="classao68000.html" title="ao68000 top level module.">ao68000</a> by the asynchronous reset input signal.</li>
|
<li>reset output, high when processing the RESET instruction. Can be used to reset external devices. </li>
|
<li>reset output, high when processing the RESET instruction. Can be used to reset external devices. </li>
|
</ul>
|
</ul>
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00757">757</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00758">758</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<hr/><h2>Member Function Documentation</h2>
|
<hr/><h2>Member Function Documentation</h2>
|
<a class="anchor" id="ad06cdf24c29b1b82596011bac2c9169c"></a><!-- doxytag: member="bus_control::ALWAYS_0" ref="ad06cdf24c29b1b82596011bac2c9169c" args="CLK_I, reset_n" -->
|
<a class="anchor" id="ad06cdf24c29b1b82596011bac2c9169c"></a><!-- doxytag: member="bus_control::ALWAYS_0" ref="ad06cdf24c29b1b82596011bac2c9169c" args="CLK_I, reset_n" -->
|
<div class="memitem">
|
<div class="memitem">
|
<div class="memproto">
|
<div class="memproto">
|
<table class="memname">
|
<table class="memname">
|
Line 160... |
Line 160... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00886">886</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00887">887</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<div class="fragment"><pre class="fragment">
|
<div class="fragment"><pre class="fragment">
|
<a name="l00886"></a>00886 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classbus__control.html#a4054e75175a8d9a78f2e34150e1c0465">CLK_I</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classbus__control.html#a7c0d04a169a341f11af2b012abd481b3">reset_n</a>) <span class="vhdlkeyword">begin</span>
|
<a name="l00887"></a>00887 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classbus__control.html#a4054e75175a8d9a78f2e34150e1c0465">CLK_I</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classbus__control.html#a7c0d04a169a341f11af2b012abd481b3">reset_n</a>) <span class="vhdlkeyword">begin</span>
|
<a name="l00887"></a>00887 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a7c0d04a169a341f11af2b012abd481b3">reset_n</a> == <span class="vhdllogic">1'b0</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l00888"></a>00888 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a7c0d04a169a341f11af2b012abd481b3">reset_n</a> == <span class="vhdllogic">1'b0</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l00888"></a>00888 <span class="vhdlchar">interrupt_mask_o</span> <= <span class="vhdllogic">3'b000</span>;
|
<a name="l00889"></a>00889 <span class="vhdlchar">interrupt_mask_o</span> <= <span class="vhdllogic">3'b000</span>;
|
<a name="l00889"></a>00889 <a class="code" href="classbus__control.html#a18d43f989323778008d066233ddaa191">last_interrupt_mask</a> <= <span class="vhdllogic">3'b000</span>;
|
<a name="l00890"></a>00890 <a class="code" href="classbus__control.html#a18d43f989323778008d066233ddaa191">last_interrupt_mask</a> <= <span class="vhdllogic">3'b000</span>;
|
<a name="l00890"></a>00890 <span class="vhdlkeyword">end</span>
|
<a name="l00891"></a>00891 <span class="vhdlkeyword">end</span>
|
<a name="l00891"></a>00891 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a93ed536c4b75b18958ffa28838ae5957">ipl_i</a> > <span class="vhdlchar">ipm_i</span> && <span class="vhdlchar">do_interrupt_i</span> == <span class="vhdllogic">1'b0</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l00892"></a>00892 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a93ed536c4b75b18958ffa28838ae5957">ipl_i</a> > <span class="vhdlchar">ipm_i</span> && <span class="vhdlchar">do_interrupt_i</span> == <span class="vhdllogic">1'b0</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l00892"></a>00892 <span class="vhdlchar">interrupt_mask_o</span> <= <a class="code" href="classbus__control.html#a93ed536c4b75b18958ffa28838ae5957">ipl_i</a>;
|
<a name="l00893"></a>00893 <span class="vhdlchar">interrupt_mask_o</span> <= <a class="code" href="classbus__control.html#a93ed536c4b75b18958ffa28838ae5957">ipl_i</a>;
|
<a name="l00893"></a>00893 <a class="code" href="classbus__control.html#a18d43f989323778008d066233ddaa191">last_interrupt_mask</a> <= <span class="vhdlchar">interrupt_mask_o</span>;
|
<a name="l00894"></a>00894 <a class="code" href="classbus__control.html#a18d43f989323778008d066233ddaa191">last_interrupt_mask</a> <= <span class="vhdlchar">interrupt_mask_o</span>;
|
<a name="l00894"></a>00894 <span class="vhdlkeyword">end</span>
|
<a name="l00895"></a>00895 <span class="vhdlkeyword">end</span>
|
<a name="l00895"></a>00895 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_interrupt_i</span> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l00896"></a>00896 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_interrupt_i</span> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l00896"></a>00896 <span class="vhdlchar">interrupt_mask_o</span> <= <a class="code" href="classbus__control.html#a18d43f989323778008d066233ddaa191">last_interrupt_mask</a>;
|
<a name="l00897"></a>00897 <span class="vhdlchar">interrupt_mask_o</span> <= <a class="code" href="classbus__control.html#a18d43f989323778008d066233ddaa191">last_interrupt_mask</a>;
|
<a name="l00897"></a>00897 <span class="vhdlkeyword">end</span>
|
<a name="l00898"></a>00898 <span class="vhdlkeyword">end</span>
|
<a name="l00898"></a>00898 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
<a name="l00899"></a>00899 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
<a name="l00899"></a>00899 <span class="vhdlchar">interrupt_mask_o</span> <= <span class="vhdllogic">3'b000</span>;
|
<a name="l00900"></a>00900 <span class="vhdlchar">interrupt_mask_o</span> <= <span class="vhdllogic">3'b000</span>;
|
<a name="l00900"></a>00900 <a class="code" href="classbus__control.html#a18d43f989323778008d066233ddaa191">last_interrupt_mask</a> <= <span class="vhdllogic">3'b000</span>;
|
<a name="l00901"></a>00901 <a class="code" href="classbus__control.html#a18d43f989323778008d066233ddaa191">last_interrupt_mask</a> <= <span class="vhdllogic">3'b000</span>;
|
<a name="l00901"></a>00901 <span class="vhdlkeyword">end</span>
|
|
<a name="l00902"></a>00902 <span class="vhdlkeyword">end</span>
|
<a name="l00902"></a>00902 <span class="vhdlkeyword">end</span>
|
|
<a name="l00903"></a>00903 <span class="vhdlkeyword">end</span>
|
</pre></div>
|
</pre></div>
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="af34450e53e6fd2fd36db7dff17caf063"></a><!-- doxytag: member="bus_control::ALWAYS_1" ref="af34450e53e6fd2fd36db7dff17caf063" args="CLK_I, reset_n" -->
|
<a class="anchor" id="af34450e53e6fd2fd36db7dff17caf063"></a><!-- doxytag: member="bus_control::ALWAYS_1" ref="af34450e53e6fd2fd36db7dff17caf063" args="CLK_I, reset_n" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 201... |
Line 201... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00906">906</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00907">907</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<div class="fragment"><pre class="fragment">
|
<div class="fragment"><pre class="fragment">
|
<a name="l00906"></a>00906 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classbus__control.html#a4054e75175a8d9a78f2e34150e1c0465">CLK_I</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classbus__control.html#a7c0d04a169a341f11af2b012abd481b3">reset_n</a>) <span class="vhdlkeyword">begin</span>
|
<a name="l00907"></a>00907 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classbus__control.html#a4054e75175a8d9a78f2e34150e1c0465">CLK_I</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classbus__control.html#a7c0d04a169a341f11af2b012abd481b3">reset_n</a>) <span class="vhdlkeyword">begin</span>
|
<a name="l00907"></a>00907 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a7c0d04a169a341f11af2b012abd481b3">reset_n</a> == <span class="vhdllogic">1'b0</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l00908"></a>00908 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a7c0d04a169a341f11af2b012abd481b3">reset_n</a> == <span class="vhdllogic">1'b0</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l00908"></a>00908 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
|
<a name="l00909"></a>00909 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
|
<a name="l00909"></a>00909 <span class="vhdlchar">interrupt_trap_o</span> <= <span class="vhdllogic">8'd0</span>;
|
<a name="l00910"></a>00910 <span class="vhdlchar">interrupt_trap_o</span> <= <span class="vhdllogic">8'd0</span>;
|
<a name="l00910"></a>00910 <span class="vhdlchar">prefetch_ir_valid_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00911"></a>00911 <span class="vhdlchar">prefetch_ir_valid_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00911"></a>00911 <span class="vhdlchar">prefetch_ir_valid_32_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00912"></a>00912 <span class="vhdlchar">prefetch_ir_valid_32_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00912"></a>00912 <span class="vhdlchar">prefetch_ir_valid_80_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00913"></a>00913 <span class="vhdlchar">prefetch_ir_valid_80_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00913"></a>00913
|
<a name="l00914"></a>00914
|
<a name="l00914"></a>00914 <span class="vhdlchar">jmp_address_trap_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00915"></a>00915 <span class="vhdlchar">jmp_address_trap_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00915"></a>00915 <span class="vhdlchar">jmp_bus_trap_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00916"></a>00916 <span class="vhdlchar">jmp_bus_trap_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00916"></a>00916
|
<a name="l00917"></a>00917
|
<a name="l00917"></a>00917 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00918"></a>00918 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00918"></a>00918 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> <= <span class="vhdllogic">30'd0</span>;
|
<a name="l00919"></a>00919 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> <= <span class="vhdllogic">30'd0</span>;
|
<a name="l00919"></a>00919 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> <= <span class="vhdllogic">32'd0</span>;
|
<a name="l00920"></a>00920 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> <= <span class="vhdllogic">32'd0</span>;
|
<a name="l00920"></a>00920 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> <= <span class="vhdllogic">4'b0</span>;
|
<a name="l00921"></a>00921 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> <= <span class="vhdllogic">4'b0</span>;
|
<a name="l00921"></a>00921 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00922"></a>00922 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00922"></a>00922 <a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00923"></a>00923 <a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00923"></a>00923 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00924"></a>00924 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00924"></a>00924 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00925"></a>00925 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00925"></a>00925 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00926"></a>00926 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00926"></a>00926 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> <= <span class="vhdllogic">3'd0</span>;
|
<a name="l00927"></a>00927 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> <= <span class="vhdllogic">3'd0</span>;
|
<a name="l00927"></a>00927 <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> <= <span class="vhdllogic">3'd0</span>;
|
<a name="l00928"></a>00928 <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> <= <span class="vhdllogic">3'd0</span>;
|
<a name="l00928"></a>00928 <a class="code" href="classbus__control.html#a139d4b4c2d79d749375db4dd71f3a9fd">reset_o</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00929"></a>00929 <a class="code" href="classbus__control.html#a139d4b4c2d79d749375db4dd71f3a9fd">reset_o</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00929"></a>00929 <span class="vhdlchar">blocked_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00930"></a>00930 <span class="vhdlchar">blocked_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00930"></a>00930 <span class="vhdlchar">data_read_o</span> <= <span class="vhdllogic">32'd0</span>;
|
<a name="l00931"></a>00931 <span class="vhdlchar">data_read_o</span> <= <span class="vhdllogic">32'd0</span>;
|
<a name="l00931"></a>00931 <span class="vhdlchar">finished_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00932"></a>00932 <span class="vhdlchar">finished_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00932"></a>00932 <span class="vhdlchar">rw_state_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00933"></a>00933 <span class="vhdlchar">rw_state_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00933"></a>00933 <span class="vhdlchar">fc_state_o</span> <= <span class="vhdllogic">3'd0</span>;
|
<a name="l00934"></a>00934 <span class="vhdlchar">fc_state_o</span> <= <span class="vhdllogic">3'd0</span>;
|
<a name="l00934"></a>00934 <span class="vhdlchar">fault_address_state_o</span> <= <span class="vhdllogic">32'd0</span>;
|
<a name="l00935"></a>00935 <span class="vhdlchar">fault_address_state_o</span> <= <span class="vhdllogic">32'd0</span>;
|
<a name="l00935"></a>00935 <a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> <= <span class="vhdllogic">2'b0</span>;
|
<a name="l00936"></a>00936 <a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> <= <span class="vhdllogic">2'b0</span>;
|
<a name="l00936"></a>00936 <a class="code" href="classbus__control.html#af4b71c6c152246795fcfed45e67bab33">reset_counter</a> <= <span class="vhdllogic">8'd0</span>;
|
<a name="l00937"></a>00937 <a class="code" href="classbus__control.html#af4b71c6c152246795fcfed45e67bab33">reset_counter</a> <= <span class="vhdllogic">8'd0</span>;
|
<a name="l00937"></a>00937 <span class="vhdlkeyword">end</span>
|
<a name="l00938"></a>00938 <span class="vhdlkeyword">end</span>
|
<a name="l00938"></a>00938 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
<a name="l00939"></a>00939 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
<a name="l00939"></a>00939 <span class="vhdlkeyword">case</span>(<a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a>)
|
<a name="l00940"></a>00940 <span class="vhdlkeyword">case</span>(<a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a>)
|
<a name="l00940"></a>00940 <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l00941"></a>00941 <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l00941"></a>00941 <span class="vhdlchar">finished_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00942"></a>00942 <span class="vhdlchar">finished_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00942"></a>00942 <span class="vhdlchar">jmp_address_trap_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00943"></a>00943 <span class="vhdlchar">jmp_address_trap_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00943"></a>00943 <span class="vhdlchar">jmp_bus_trap_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00944"></a>00944 <span class="vhdlchar">jmp_bus_trap_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00944"></a>00944 <a class="code" href="classbus__control.html#a139d4b4c2d79d749375db4dd71f3a9fd">reset_o</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00945"></a>00945 <a class="code" href="classbus__control.html#a139d4b4c2d79d749375db4dd71f3a9fd">reset_o</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00945"></a>00945 <span class="vhdlchar">blocked_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00946"></a>00946 <span class="vhdlchar">blocked_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00946"></a>00946
|
<a name="l00947"></a>00947
|
<a name="l00947"></a>00947 <span class="keyword">// block</span>
|
<a name="l00948"></a>00948 <span class="keyword">// block</span>
|
<a name="l00948"></a>00948 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_blocked_i</span> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l00949"></a>00949 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_blocked_i</span> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l00949"></a>00949 <span class="vhdlchar">blocked_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l00950"></a>00950 <span class="vhdlchar">blocked_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l00950"></a>00950 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a2545a07988315cbf68e808af80333335">S_BLOCKED</a>;
|
<a name="l00951"></a>00951 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a2545a07988315cbf68e808af80333335">S_BLOCKED</a>;
|
<a name="l00951"></a>00951 <span class="vhdlkeyword">end</span>
|
<a name="l00952"></a>00952 <span class="vhdlkeyword">end</span>
|
<a name="l00952"></a>00952 <span class="keyword">// reset</span>
|
<a name="l00953"></a>00953 <span class="keyword">// reset</span>
|
<a name="l00953"></a>00953 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_reset_i</span> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l00954"></a>00954 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_reset_i</span> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l00954"></a>00954 <a class="code" href="classbus__control.html#a139d4b4c2d79d749375db4dd71f3a9fd">reset_o</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l00955"></a>00955 <a class="code" href="classbus__control.html#a139d4b4c2d79d749375db4dd71f3a9fd">reset_o</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l00955"></a>00955 <a class="code" href="classbus__control.html#af4b71c6c152246795fcfed45e67bab33">reset_counter</a> <= <span class="vhdllogic">8'd124</span>;
|
<a name="l00956"></a>00956 <a class="code" href="classbus__control.html#af4b71c6c152246795fcfed45e67bab33">reset_counter</a> <= <span class="vhdllogic">8'd124</span>;
|
<a name="l00956"></a>00956 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a8e24d83b04e325557b534b6fbe3c06ca">S_RESET</a>;
|
<a name="l00957"></a>00957 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a8e24d83b04e325557b534b6fbe3c06ca">S_RESET</a>;
|
<a name="l00957"></a>00957 <span class="vhdlkeyword">end</span>
|
<a name="l00958"></a>00958 <span class="vhdlkeyword">end</span>
|
<a name="l00958"></a>00958 <span class="keyword">// read</span>
|
<a name="l00959"></a>00959 <span class="keyword">// read</span>
|
<a name="l00959"></a>00959 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_read_i</span> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l00960"></a>00960 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_read_i</span> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l00960"></a>00960 <a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00961"></a>00961 <a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00961"></a>00961 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1'b1</span>) <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> <= (<span class="vhdlchar">address_type_i</span> == <span class="vhdllogic">1'b0</span>) ? <a class="code" href="classbus__control.html#a6cb25547c77c5085562bd0ace17d08a4">FC_SUPERVISOR_DATA</a> : <a class="code" href="classbus__control.html#a1dc6742718597d6e0ef98e8200bb49bf">FC_SUPERVISOR_PROGRAM</a>;
|
<a name="l00962"></a>00962 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1'b1</span>) <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> <= (<span class="vhdlchar">address_type_i</span> == <span class="vhdllogic">1'b0</span>) ? <a class="code" href="classbus__control.html#a6cb25547c77c5085562bd0ace17d08a4">FC_SUPERVISOR_DATA</a> : <a class="code" href="classbus__control.html#a1dc6742718597d6e0ef98e8200bb49bf">FC_SUPERVISOR_PROGRAM</a>;
|
<a name="l00962"></a>00962 <span class="vhdlkeyword">else</span> <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> <= (<span class="vhdlchar">address_type_i</span> == <span class="vhdllogic">1'b0</span>) ? <a class="code" href="classbus__control.html#abd13c1b70988aa3f59e1d9cc23e62eb2">FC_USER_DATA</a> : <a class="code" href="classbus__control.html#a80b93f8634a7f03a199836a78c52d9bb">FC_USER_PROGRAM</a>;
|
<a name="l00963"></a>00963 <span class="vhdlkeyword">else</span> <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> <= (<span class="vhdlchar">address_type_i</span> == <span class="vhdllogic">1'b0</span>) ? <a class="code" href="classbus__control.html#abd13c1b70988aa3f59e1d9cc23e62eb2">FC_USER_DATA</a> : <a class="code" href="classbus__control.html#a80b93f8634a7f03a199836a78c52d9bb">FC_USER_PROGRAM</a>;
|
<a name="l00963"></a>00963
|
<a name="l00964"></a>00964
|
<a name="l00964"></a>00964 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span> && (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b0</span>)) <span class="vhdlkeyword">begin</span> <span class="keyword">// WORD or LONG WORD</span>
|
<a name="l00965"></a>00965 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span> && (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b0</span>)) <span class="vhdlkeyword">begin</span> <span class="keyword">// WORD or LONG WORD</span>
|
<a name="l00965"></a>00965 <span class="vhdlchar">fault_address_state_o</span> <= <span class="vhdlchar">address_i</span>;
|
<a name="l00966"></a>00966 <span class="vhdlchar">fault_address_state_o</span> <= <span class="vhdlchar">address_i</span>;
|
<a name="l00966"></a>00966 <span class="vhdlchar">rw_state_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l00967"></a>00967 <span class="vhdlchar">rw_state_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l00967"></a>00967 <span class="vhdlchar">fc_state_o</span> <= (<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1'b1</span>) ? ((<span class="vhdlchar">address_type_i</span> == <span class="vhdllogic">1'b0</span>) ? <a class="code" href="classbus__control.html#a6cb25547c77c5085562bd0ace17d08a4">FC_SUPERVISOR_DATA</a> : <a class="code" href="classbus__control.html#a1dc6742718597d6e0ef98e8200bb49bf">FC_SUPERVISOR_PROGRAM</a>) :
|
<a name="l00968"></a>00968 <span class="vhdlchar">fc_state_o</span> <= (<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1'b1</span>) ? ((<span class="vhdlchar">address_type_i</span> == <span class="vhdllogic">1'b0</span>) ? <a class="code" href="classbus__control.html#a6cb25547c77c5085562bd0ace17d08a4">FC_SUPERVISOR_DATA</a> : <a class="code" href="classbus__control.html#a1dc6742718597d6e0ef98e8200bb49bf">FC_SUPERVISOR_PROGRAM</a>) :
|
<a name="l00968"></a>00968 ((<span class="vhdlchar">address_type_i</span> == <span class="vhdllogic">1'b0</span>) ? <a class="code" href="classbus__control.html#abd13c1b70988aa3f59e1d9cc23e62eb2">FC_USER_DATA</a> : <a class="code" href="classbus__control.html#a80b93f8634a7f03a199836a78c52d9bb">FC_USER_PROGRAM</a>);
|
<a name="l00969"></a>00969 ((<span class="vhdlchar">address_type_i</span> == <span class="vhdllogic">1'b0</span>) ? <a class="code" href="classbus__control.html#abd13c1b70988aa3f59e1d9cc23e62eb2">FC_USER_DATA</a> : <a class="code" href="classbus__control.html#a80b93f8634a7f03a199836a78c52d9bb">FC_USER_PROGRAM</a>);
|
<a name="l00969"></a>00969 <span class="vhdlchar">interrupt_trap_o</span> <= <a class="code" href="classbus__control.html#a16c432fa4a9897426aab6df04ee608e0">VECTOR_ADDRESS_TRAP</a>;
|
<a name="l00970"></a>00970 <span class="vhdlchar">interrupt_trap_o</span> <= <a class="code" href="classbus__control.html#a16c432fa4a9897426aab6df04ee608e0">VECTOR_ADDRESS_TRAP</a>;
|
<a name="l00970"></a>00970
|
<a name="l00971"></a>00971
|
<a name="l00971"></a>00971 <span class="vhdlchar">jmp_address_trap_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l00972"></a>00972 <span class="vhdlchar">jmp_address_trap_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l00972"></a>00972 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l00973"></a>00973 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l00973"></a>00973 <span class="vhdlkeyword">end</span>
|
<a name="l00974"></a>00974 <span class="vhdlkeyword">end</span>
|
<a name="l00974"></a>00974 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
<a name="l00975"></a>00975 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
<a name="l00975"></a>00975 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l00976"></a>00976 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l00976"></a>00976 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> <= <span class="vhdlchar">address_i</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
|
<a name="l00977"></a>00977 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> <= <span class="vhdlchar">address_i</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
|
<a name="l00977"></a>00977 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> <= (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span> && <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b00</span>)? <span class="vhdllogic">4'b1000</span> :
|
<a name="l00978"></a>00978 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> <= (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span> && <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b00</span>)? <span class="vhdllogic">4'b1000</span> :
|
<a name="l00978"></a>00978 (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span> && <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b01</span>)? <span class="vhdllogic">4'b0100</span> :
|
<a name="l00979"></a>00979 (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span> && <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b01</span>)? <span class="vhdllogic">4'b0100</span> :
|
<a name="l00979"></a>00979 (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span> && <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b10</span>)? <span class="vhdllogic">4'b0010</span> :
|
<a name="l00980"></a>00980 (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span> && <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b10</span>)? <span class="vhdllogic">4'b0010</span> :
|
<a name="l00980"></a>00980 (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span> && <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b11</span>)? <span class="vhdllogic">4'b0001</span> :
|
<a name="l00981"></a>00981 (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span> && <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b11</span>)? <span class="vhdllogic">4'b0001</span> :
|
<a name="l00981"></a>00981 (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b1</span> && <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">2'b0</span>)? <span class="vhdllogic">4'b1100</span> :
|
<a name="l00982"></a>00982 (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b1</span> && <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">2'b0</span>)? <span class="vhdllogic">4'b1100</span> :
|
<a name="l00982"></a>00982 (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b0</span> && <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">2'b1</span>)? <span class="vhdllogic">4'b0011</span> :
|
<a name="l00983"></a>00983 (<span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b0</span> && <span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">2'b1</span>)? <span class="vhdllogic">4'b0011</span> :
|
<a name="l00983"></a>00983 <span class="vhdllogic">4'b1111</span>;
|
<a name="l00984"></a>00984 <span class="vhdllogic">4'b1111</span>;
|
<a name="l00984"></a>00984 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l00985"></a>00985 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l00985"></a>00985
|
<a name="l00986"></a>00986
|
<a name="l00986"></a>00986 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">read_modify_write_i</span> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l00987"></a>00987 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">read_modify_write_i</span> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l00987"></a>00987 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00988"></a>00988 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00988"></a>00988 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00989"></a>00989 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00989"></a>00989 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l00990"></a>00990 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l00990"></a>00990 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> <= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
|
<a name="l00991"></a>00991 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> <= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
|
<a name="l00991"></a>00991 <span class="vhdlkeyword">end</span>
|
<a name="l00992"></a>00992 <span class="vhdlkeyword">end</span>
|
<a name="l00992"></a>00992 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b10</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l00993"></a>00993 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b10</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l00993"></a>00993 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00994"></a>00994 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00994"></a>00994 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l00995"></a>00995 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l00995"></a>00995 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00996"></a>00996 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l00996"></a>00996 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> <= <a class="code" href="classbus__control.html#a9c7e8a6d030ee1f404d7526ebda509ca">CTI_INCR_CYCLE</a>;
|
<a name="l00997"></a>00997 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> <= <a class="code" href="classbus__control.html#a9c7e8a6d030ee1f404d7526ebda509ca">CTI_INCR_CYCLE</a>;
|
<a name="l00997"></a>00997 <span class="vhdlkeyword">end</span>
|
<a name="l00998"></a>00998 <span class="vhdlkeyword">end</span>
|
<a name="l00998"></a>00998 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
<a name="l00999"></a>00999 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
<a name="l00999"></a>00999 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01000"></a>01000 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01000"></a>01000 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01001"></a>01001 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01001"></a>01001 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01002"></a>01002 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01002"></a>01002 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> <= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
|
<a name="l01003"></a>01003 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> <= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
|
<a name="l01003"></a>01003 <span class="vhdlkeyword">end</span>
|
<a name="l01004"></a>01004 <span class="vhdlkeyword">end</span>
|
<a name="l01004"></a>01004
|
<a name="l01005"></a>01005
|
<a name="l01005"></a>01005 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#af752b2515eb632068e26865f1569598c">S_READ_1</a>;
|
<a name="l01006"></a>01006 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#af752b2515eb632068e26865f1569598c">S_READ_1</a>;
|
<a name="l01006"></a>01006 <span class="vhdlkeyword">end</span>
|
|
<a name="l01007"></a>01007 <span class="vhdlkeyword">end</span>
|
<a name="l01007"></a>01007 <span class="vhdlkeyword">end</span>
|
<a name="l01008"></a>01008 <span class="keyword">// write</span>
|
<a name="l01008"></a>01008 <span class="vhdlkeyword">end</span>
|
<a name="l01009"></a>01009 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_write_i</span> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01009"></a>01009 <span class="keyword">// write</span>
|
<a name="l01010"></a>01010 <a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01010"></a>01010 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_write_i</span> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01011"></a>01011 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1'b1</span>) <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> <= <a class="code" href="classbus__control.html#a6cb25547c77c5085562bd0ace17d08a4">FC_SUPERVISOR_DATA</a>;
|
<a name="l01011"></a>01011 <a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01012"></a>01012 <span class="vhdlkeyword">else</span> <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> <= <a class="code" href="classbus__control.html#abd13c1b70988aa3f59e1d9cc23e62eb2">FC_USER_DATA</a>;
|
<a name="l01012"></a>01012 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1'b1</span>) <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> <= <a class="code" href="classbus__control.html#a6cb25547c77c5085562bd0ace17d08a4">FC_SUPERVISOR_DATA</a>;
|
<a name="l01013"></a>01013
|
<a name="l01013"></a>01013 <span class="vhdlkeyword">else</span> <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> <= <a class="code" href="classbus__control.html#abd13c1b70988aa3f59e1d9cc23e62eb2">FC_USER_DATA</a>;
|
<a name="l01014"></a>01014 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b0</span>) <span class="vhdlkeyword">begin</span> <span class="keyword">// WORD or LONG WORD</span>
|
<a name="l01014"></a>01014
|
<a name="l01015"></a>01015 <span class="vhdlchar">fault_address_state_o</span> <= <span class="vhdlchar">address_i</span>;
|
<a name="l01015"></a>01015 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b0</span>) <span class="vhdlkeyword">begin</span> <span class="keyword">// WORD or LONG WORD</span>
|
<a name="l01016"></a>01016 <span class="vhdlchar">rw_state_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01016"></a>01016 <span class="vhdlchar">fault_address_state_o</span> <= <span class="vhdlchar">address_i</span>;
|
<a name="l01017"></a>01017 <span class="vhdlchar">fc_state_o</span> <= (<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1'b1</span>) ? <a class="code" href="classbus__control.html#a6cb25547c77c5085562bd0ace17d08a4">FC_SUPERVISOR_DATA</a> : <a class="code" href="classbus__control.html#abd13c1b70988aa3f59e1d9cc23e62eb2">FC_USER_DATA</a>;
|
<a name="l01017"></a>01017 <span class="vhdlchar">rw_state_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01018"></a>01018 <span class="vhdlchar">interrupt_trap_o</span> <= <a class="code" href="classbus__control.html#a16c432fa4a9897426aab6df04ee608e0">VECTOR_ADDRESS_TRAP</a>;
|
<a name="l01018"></a>01018 <span class="vhdlchar">fc_state_o</span> <= (<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1'b1</span>) ? <a class="code" href="classbus__control.html#a6cb25547c77c5085562bd0ace17d08a4">FC_SUPERVISOR_DATA</a> : <a class="code" href="classbus__control.html#abd13c1b70988aa3f59e1d9cc23e62eb2">FC_USER_DATA</a>;
|
<a name="l01019"></a>01019
|
<a name="l01019"></a>01019 <span class="vhdlchar">interrupt_trap_o</span> <= <a class="code" href="classbus__control.html#a16c432fa4a9897426aab6df04ee608e0">VECTOR_ADDRESS_TRAP</a>;
|
<a name="l01020"></a>01020 <span class="vhdlchar">jmp_address_trap_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01020"></a>01020
|
<a name="l01021"></a>01021 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l01021"></a>01021 <span class="vhdlchar">jmp_address_trap_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01022"></a>01022 <span class="vhdlkeyword">end</span>
|
<a name="l01022"></a>01022 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l01023"></a>01023 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
<a name="l01023"></a>01023 <span class="vhdlkeyword">end</span>
|
<a name="l01024"></a>01024 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01024"></a>01024 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
<a name="l01025"></a>01025 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> <= <span class="vhdlchar">address_i</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
|
<a name="l01025"></a>01025 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01026"></a>01026 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01026"></a>01026 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> <= <span class="vhdlchar">address_i</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
|
<a name="l01027"></a>01027
|
<a name="l01027"></a>01027 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01028"></a>01028 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b10</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01028"></a>01028
|
<a name="l01029"></a>01029 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> <= { <span class="vhdllogic">16'b0</span>, <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>] };
|
<a name="l01029"></a>01029 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b10</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01030"></a>01030 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> <= <span class="vhdllogic">4'b0011</span>;
|
<a name="l01030"></a>01030 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> <= { <span class="vhdllogic">16'b0</span>, <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>] };
|
<a name="l01031"></a>01031 <span class="vhdlkeyword">end</span>
|
<a name="l01031"></a>01031 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> <= <span class="vhdllogic">4'b0011</span>;
|
<a name="l01032"></a>01032 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b00</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01032"></a>01032 <span class="vhdlkeyword">end</span>
|
<a name="l01033"></a>01033 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> <= <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
|
<a name="l01033"></a>01033 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b00</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01034"></a>01034 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> <= <span class="vhdllogic">4'b1111</span>;
|
<a name="l01034"></a>01034 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> <= <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
|
<a name="l01035"></a>01035 <span class="vhdlkeyword">end</span>
|
<a name="l01035"></a>01035 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> <= <span class="vhdllogic">4'b1111</span>;
|
<a name="l01036"></a>01036 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b10</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01036"></a>01036 <span class="vhdlkeyword">end</span>
|
<a name="l01037"></a>01037 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> <= { <span class="vhdllogic">16'b0</span>, <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] };
|
<a name="l01037"></a>01037 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b10</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01038"></a>01038 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> <= <span class="vhdllogic">4'b0011</span>;
|
<a name="l01038"></a>01038 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> <= { <span class="vhdllogic">16'b0</span>, <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] };
|
<a name="l01039"></a>01039 <span class="vhdlkeyword">end</span>
|
<a name="l01039"></a>01039 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> <= <span class="vhdllogic">4'b0011</span>;
|
<a name="l01040"></a>01040 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b00</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01040"></a>01040 <span class="vhdlkeyword">end</span>
|
<a name="l01041"></a>01041 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> <= { <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16'b0</span> };
|
<a name="l01041"></a>01041 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b00</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01042"></a>01042 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> <= <span class="vhdllogic">4'b1100</span>;
|
<a name="l01042"></a>01042 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> <= { <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16'b0</span> };
|
<a name="l01043"></a>01043 <span class="vhdlkeyword">end</span>
|
<a name="l01043"></a>01043 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> <= <span class="vhdllogic">4'b1100</span>;
|
<a name="l01044"></a>01044 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b11</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01044"></a>01044 <span class="vhdlkeyword">end</span>
|
<a name="l01045"></a>01045 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> <= { <span class="vhdllogic">24'b0</span>, <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] };
|
<a name="l01045"></a>01045 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b11</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01046"></a>01046 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> <= <span class="vhdllogic">4'b0001</span>;
|
<a name="l01046"></a>01046 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> <= { <span class="vhdllogic">24'b0</span>, <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] };
|
<a name="l01047"></a>01047 <span class="vhdlkeyword">end</span>
|
<a name="l01047"></a>01047 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> <= <span class="vhdllogic">4'b0001</span>;
|
<a name="l01048"></a>01048 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b10</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01048"></a>01048 <span class="vhdlkeyword">end</span>
|
<a name="l01049"></a>01049 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> <= { <span class="vhdllogic">16'b0</span>, <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">8'b0</span> };
|
<a name="l01049"></a>01049 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b10</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01050"></a>01050 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> <= <span class="vhdllogic">4'b0010</span>;
|
<a name="l01050"></a>01050 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> <= { <span class="vhdllogic">16'b0</span>, <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">8'b0</span> };
|
<a name="l01051"></a>01051 <span class="vhdlkeyword">end</span>
|
<a name="l01051"></a>01051 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> <= <span class="vhdllogic">4'b0010</span>;
|
<a name="l01052"></a>01052 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b01</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01052"></a>01052 <span class="vhdlkeyword">end</span>
|
<a name="l01053"></a>01053 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> <= { <span class="vhdllogic">8'b0</span>, <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16'b0</span> };
|
<a name="l01053"></a>01053 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b01</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01054"></a>01054 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> <= <span class="vhdllogic">4'b0100</span>;
|
<a name="l01054"></a>01054 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> <= { <span class="vhdllogic">8'b0</span>, <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16'b0</span> };
|
<a name="l01055"></a>01055 <span class="vhdlkeyword">end</span>
|
<a name="l01055"></a>01055 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> <= <span class="vhdllogic">4'b0100</span>;
|
<a name="l01056"></a>01056 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b00</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01056"></a>01056 <span class="vhdlkeyword">end</span>
|
<a name="l01057"></a>01057 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> <= { <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">24'b0</span> };
|
<a name="l01057"></a>01057 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b00</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01058"></a>01058 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> <= <span class="vhdllogic">4'b1000</span>;
|
<a name="l01058"></a>01058 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> <= { <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">24'b0</span> };
|
<a name="l01059"></a>01059 <span class="vhdlkeyword">end</span>
|
<a name="l01059"></a>01059 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> <= <span class="vhdllogic">4'b1000</span>;
|
<a name="l01060"></a>01060
|
<a name="l01060"></a>01060 <span class="vhdlkeyword">end</span>
|
<a name="l01061"></a>01061 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">read_modify_write_i</span> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01061"></a>01061
|
<a name="l01062"></a>01062 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01062"></a>01062 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">read_modify_write_i</span> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01063"></a>01063 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01063"></a>01063 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01064"></a>01064 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01064"></a>01064 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01065"></a>01065 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> <= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
|
<a name="l01065"></a>01065 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01066"></a>01066 <span class="vhdlkeyword">end</span>
|
<a name="l01066"></a>01066 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> <= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
|
<a name="l01067"></a>01067 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b10</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01067"></a>01067 <span class="vhdlkeyword">end</span>
|
<a name="l01068"></a>01068 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01068"></a>01068 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b10</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01069"></a>01069 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01069"></a>01069 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01070"></a>01070 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01070"></a>01070 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01071"></a>01071 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> <= <a class="code" href="classbus__control.html#a9c7e8a6d030ee1f404d7526ebda509ca">CTI_INCR_CYCLE</a>;
|
<a name="l01071"></a>01071 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01072"></a>01072 <span class="vhdlkeyword">end</span>
|
<a name="l01072"></a>01072 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> <= <a class="code" href="classbus__control.html#a9c7e8a6d030ee1f404d7526ebda509ca">CTI_INCR_CYCLE</a>;
|
<a name="l01073"></a>01073 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
<a name="l01073"></a>01073 <span class="vhdlkeyword">end</span>
|
<a name="l01074"></a>01074 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01074"></a>01074 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
<a name="l01075"></a>01075 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01075"></a>01075 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01076"></a>01076 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01076"></a>01076 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01077"></a>01077 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> <= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
|
<a name="l01077"></a>01077 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01078"></a>01078 <span class="vhdlkeyword">end</span>
|
<a name="l01078"></a>01078 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> <= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
|
<a name="l01079"></a>01079
|
<a name="l01079"></a>01079 <span class="vhdlkeyword">end</span>
|
<a name="l01080"></a>01080 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#aad6d7bc2df8264837b68548b4045a54b">S_WRITE_1</a>;
|
<a name="l01080"></a>01080
|
<a name="l01081"></a>01081 <span class="vhdlkeyword">end</span>
|
<a name="l01081"></a>01081 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#aad6d7bc2df8264837b68548b4045a54b">S_WRITE_1</a>;
|
<a name="l01082"></a>01082 <span class="vhdlkeyword">end</span>
|
<a name="l01082"></a>01082 <span class="vhdlkeyword">end</span>
|
<a name="l01083"></a>01083 <span class="keyword">// pc</span>
|
<a name="l01083"></a>01083 <span class="vhdlkeyword">end</span>
|
<a name="l01084"></a>01084 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">prefetch_ir_valid_o</span> == <span class="vhdllogic">1'b0</span> || <span class="vhdlchar">pc_change_i</span> != <span class="vhdllogic">2'b00</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01084"></a>01084 <span class="keyword">// pc</span>
|
<a name="l01085"></a>01085
|
<a name="l01085"></a>01085 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">prefetch_ir_valid_o</span> == <span class="vhdllogic">1'b0</span> || <span class="vhdlchar">pc_change_i</span> != <span class="vhdllogic">2'b00</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01086"></a>01086 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">prefetch_ir_valid_o</span> == <span class="vhdllogic">1'b0</span> || <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2'b10</span> || <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2'b11</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01086"></a>01086
|
<a name="l01087"></a>01087 <span class="keyword">// load 4 words: [79:16] in 2,3 cycles</span>
|
<a name="l01087"></a>01087 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">prefetch_ir_valid_o</span> == <span class="vhdllogic">1'b0</span> || <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2'b10</span> || <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2'b11</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01088"></a>01088 <span class="vhdlchar">prefetch_ir_valid_32_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01088"></a>01088 <span class="keyword">// load 4 words: [79:16] in 2,3 cycles</span>
|
<a name="l01089"></a>01089 <span class="vhdlchar">prefetch_ir_valid_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01089"></a>01089 <span class="vhdlchar">prefetch_ir_valid_32_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01090"></a>01090 <span class="vhdlchar">prefetch_ir_valid_80_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01090"></a>01090 <span class="vhdlchar">prefetch_ir_valid_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01091"></a>01091
|
<a name="l01091"></a>01091 <span class="vhdlchar">prefetch_ir_valid_80_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01092"></a>01092 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#abc89f2549e5275c60648fc9a94876e29">S_PC_0</a>;
|
<a name="l01092"></a>01092
|
<a name="l01093"></a>01093 <span class="vhdlkeyword">end</span>
|
<a name="l01093"></a>01093 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#abc89f2549e5275c60648fc9a94876e29">S_PC_0</a>;
|
<a name="l01094"></a>01094 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">prefetch_ir_valid_80_o</span> == <span class="vhdllogic">1'b0</span> && <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2'b01</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01094"></a>01094 <span class="vhdlkeyword">end</span>
|
<a name="l01095"></a>01095 <span class="keyword">// load 2 words: [31:0] in 1 cycle</span>
|
<a name="l01095"></a>01095 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">prefetch_ir_valid_80_o</span> == <span class="vhdllogic">1'b0</span> && <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2'b01</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01096"></a>01096 <span class="vhdlchar">prefetch_ir_valid_32_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01096"></a>01096 <span class="keyword">// load 2 words: [31:0] in 1 cycle</span>
|
<a name="l01097"></a>01097 <span class="vhdlchar">prefetch_ir_valid_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01097"></a>01097 <span class="vhdlchar">prefetch_ir_valid_32_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01098"></a>01098 <span class="vhdlchar">prefetch_ir_valid_80_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01098"></a>01098 <span class="vhdlchar">prefetch_ir_valid_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01099"></a>01099
|
<a name="l01099"></a>01099 <span class="vhdlchar">prefetch_ir_valid_80_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01100"></a>01100 <span class="vhdlchar">prefetch_ir_o</span> <= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">63</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16'b0</span> };
|
<a name="l01100"></a>01100
|
<a name="l01101"></a>01101 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#abc89f2549e5275c60648fc9a94876e29">S_PC_0</a>;
|
<a name="l01101"></a>01101 <span class="vhdlchar">prefetch_ir_o</span> <= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">63</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16'b0</span> };
|
<a name="l01102"></a>01102 <span class="vhdlkeyword">end</span>
|
<a name="l01102"></a>01102 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#abc89f2549e5275c60648fc9a94876e29">S_PC_0</a>;
|
<a name="l01103"></a>01103 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
<a name="l01103"></a>01103 <span class="vhdlkeyword">end</span>
|
<a name="l01104"></a>01104 <span class="keyword">// do not load any words</span>
|
<a name="l01104"></a>01104 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
<a name="l01105"></a>01105 <span class="vhdlchar">prefetch_ir_valid_32_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01105"></a>01105 <span class="keyword">// do not load any words</span>
|
<a name="l01106"></a>01106 <span class="vhdlchar">prefetch_ir_valid_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01106"></a>01106 <span class="vhdlchar">prefetch_ir_valid_32_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01107"></a>01107 <span class="vhdlchar">prefetch_ir_valid_80_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01107"></a>01107 <span class="vhdlchar">prefetch_ir_valid_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01108"></a>01108
|
<a name="l01108"></a>01108 <span class="vhdlchar">prefetch_ir_valid_80_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01109"></a>01109 <span class="vhdlchar">prefetch_ir_o</span> <= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">63</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16'b0</span> };
|
<a name="l01109"></a>01109
|
<a name="l01110"></a>01110 <span class="vhdlkeyword">end</span>
|
<a name="l01110"></a>01110 <span class="vhdlchar">prefetch_ir_o</span> <= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">63</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16'b0</span> };
|
<a name="l01111"></a>01111
|
<a name="l01111"></a>01111 <span class="vhdlkeyword">end</span>
|
<a name="l01112"></a>01112
|
<a name="l01112"></a>01112
|
<a name="l01113"></a>01113 <span class="vhdlkeyword">end</span>
|
<a name="l01113"></a>01113
|
<a name="l01114"></a>01114 <span class="keyword">// interrupt</span>
|
<a name="l01114"></a>01114 <span class="vhdlkeyword">end</span>
|
<a name="l01115"></a>01115 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_interrupt_i</span> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01115"></a>01115 <span class="keyword">// interrupt</span>
|
<a name="l01116"></a>01116 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01116"></a>01116 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_interrupt_i</span> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01117"></a>01117 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> <= { <span class="vhdllogic">27'b111_1111_1111_1111_1111_1111_1111</span>, <a class="code" href="classbus__control.html#a18d43f989323778008d066233ddaa191">last_interrupt_mask</a> };
|
<a name="l01117"></a>01117 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01118"></a>01118 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> <= <span class="vhdllogic">4'b1111</span>;
|
<a name="l01118"></a>01118 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> <= { <span class="vhdllogic">27'b111_1111_1111_1111_1111_1111_1111</span>, <a class="code" href="classbus__control.html#a18d43f989323778008d066233ddaa191">last_interrupt_mask</a> };
|
<a name="l01119"></a>01119 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01119"></a>01119 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> <= <span class="vhdllogic">4'b1111</span>;
|
<a name="l01120"></a>01120 <a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01120"></a>01120 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01121"></a>01121
|
<a name="l01121"></a>01121 <a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01122"></a>01122 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01122"></a>01122
|
<a name="l01123"></a>01123 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01123"></a>01123 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01124"></a>01124 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01124"></a>01124 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01125"></a>01125 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> <= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
|
<a name="l01125"></a>01125 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01126"></a>01126
|
<a name="l01126"></a>01126 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> <= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
|
<a name="l01127"></a>01127 <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> <= <a class="code" href="classbus__control.html#ac44cb27522dcf872ea1f1d63cb652d9b">FC_CPU_SPACE</a>;
|
<a name="l01127"></a>01127
|
<a name="l01128"></a>01128
|
<a name="l01128"></a>01128 <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> <= <a class="code" href="classbus__control.html#ac44cb27522dcf872ea1f1d63cb652d9b">FC_CPU_SPACE</a>;
|
<a name="l01129"></a>01129 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a8ff92de377aefca42782778cda7132f3">S_INT_1</a>;
|
<a name="l01129"></a>01129
|
<a name="l01130"></a>01130 <span class="vhdlkeyword">end</span>
|
<a name="l01130"></a>01130 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a8ff92de377aefca42782778cda7132f3">S_INT_1</a>;
|
<a name="l01131"></a>01131 <span class="vhdlkeyword">end</span>
|
<a name="l01131"></a>01131 <span class="vhdlkeyword">end</span>
|
<a name="l01132"></a>01132
|
<a name="l01132"></a>01132 <span class="vhdlkeyword">end</span>
|
<a name="l01133"></a>01133 <a class="code" href="classbus__control.html#a8e24d83b04e325557b534b6fbe3c06ca">S_RESET</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l01133"></a>01133
|
<a name="l01134"></a>01134 <a class="code" href="classbus__control.html#af4b71c6c152246795fcfed45e67bab33">reset_counter</a> <= <a class="code" href="classbus__control.html#af4b71c6c152246795fcfed45e67bab33">reset_counter</a> - <span class="vhdllogic">8'd1</span>;
|
<a name="l01134"></a>01134 <a class="code" href="classbus__control.html#a8e24d83b04e325557b534b6fbe3c06ca">S_RESET</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l01135"></a>01135
|
<a name="l01135"></a>01135 <a class="code" href="classbus__control.html#af4b71c6c152246795fcfed45e67bab33">reset_counter</a> <= <a class="code" href="classbus__control.html#af4b71c6c152246795fcfed45e67bab33">reset_counter</a> - <span class="vhdllogic">8'd1</span>;
|
<a name="l01136"></a>01136 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#af4b71c6c152246795fcfed45e67bab33">reset_counter</a> == <span class="vhdllogic">8'd0</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01136"></a>01136
|
<a name="l01137"></a>01137 <span class="vhdlchar">finished_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01137"></a>01137 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#af4b71c6c152246795fcfed45e67bab33">reset_counter</a> == <span class="vhdllogic">8'd0</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01138"></a>01138 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l01138"></a>01138 <span class="vhdlchar">finished_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01139"></a>01139 <span class="vhdlkeyword">end</span>
|
<a name="l01139"></a>01139 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l01140"></a>01140 <span class="vhdlkeyword">end</span>
|
<a name="l01140"></a>01140 <span class="vhdlkeyword">end</span>
|
<a name="l01141"></a>01141
|
<a name="l01141"></a>01141 <span class="vhdlkeyword">end</span>
|
<a name="l01142"></a>01142 <a class="code" href="classbus__control.html#a2545a07988315cbf68e808af80333335">S_BLOCKED</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l01142"></a>01142
|
<a name="l01143"></a>01143 <span class="vhdlkeyword">end</span>
|
<a name="l01143"></a>01143 <a class="code" href="classbus__control.html#a2545a07988315cbf68e808af80333335">S_BLOCKED</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l01144"></a>01144
|
<a name="l01144"></a>01144 <span class="vhdlkeyword">end</span>
|
<a name="l01145"></a>01145 <a class="code" href="classbus__control.html#a8ff92de377aefca42782778cda7132f3">S_INT_1</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l01145"></a>01145
|
<a name="l01146"></a>01146 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01146"></a>01146 <a class="code" href="classbus__control.html#a8ff92de377aefca42782778cda7132f3">S_INT_1</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l01147"></a>01147 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01147"></a>01147 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01148"></a>01148 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01148"></a>01148 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01149"></a>01149
|
<a name="l01149"></a>01149 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01150"></a>01150 <span class="vhdlchar">interrupt_trap_o</span> <= <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
|
<a name="l01150"></a>01150
|
<a name="l01151"></a>01151
|
<a name="l01151"></a>01151 <span class="vhdlchar">interrupt_trap_o</span> <= <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>];
|
<a name="l01152"></a>01152 <span class="vhdlchar">finished_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01152"></a>01152
|
<a name="l01153"></a>01153 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l01153"></a>01153 <span class="vhdlchar">finished_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01154"></a>01154 <span class="vhdlkeyword">end</span>
|
<a name="l01154"></a>01154 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l01155"></a>01155 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01155"></a>01155 <span class="vhdlkeyword">end</span>
|
<a name="l01156"></a>01156 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01156"></a>01156 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01157"></a>01157 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01157"></a>01157 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01158"></a>01158
|
<a name="l01158"></a>01158 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01159"></a>01159 <span class="vhdlchar">interrupt_trap_o</span> <= <span class="vhdllogic">8'd24</span> + { <span class="vhdllogic">5'b0</span>, <span class="vhdlchar">interrupt_mask_o</span> };
|
<a name="l01159"></a>01159
|
<a name="l01160"></a>01160
|
<a name="l01160"></a>01160 <span class="vhdlchar">interrupt_trap_o</span> <= <span class="vhdllogic">8'd24</span> + { <span class="vhdllogic">5'b0</span>, <span class="vhdlchar">interrupt_mask_o</span> };
|
<a name="l01161"></a>01161 <span class="vhdlchar">finished_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01161"></a>01161
|
<a name="l01162"></a>01162 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l01162"></a>01162 <span class="vhdlchar">finished_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01163"></a>01163 <span class="vhdlkeyword">end</span>
|
<a name="l01163"></a>01163 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l01164"></a>01164 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01164"></a>01164 <span class="vhdlkeyword">end</span>
|
<a name="l01165"></a>01165 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01165"></a>01165 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01166"></a>01166 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01166"></a>01166 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01167"></a>01167
|
<a name="l01167"></a>01167 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01168"></a>01168 <span class="vhdlchar">interrupt_trap_o</span> <= <span class="vhdllogic">8'd24</span>; <span class="keyword">// spurious interrupt</span>
|
<a name="l01168"></a>01168
|
<a name="l01169"></a>01169
|
<a name="l01169"></a>01169 <span class="vhdlchar">interrupt_trap_o</span> <= <span class="vhdllogic">8'd24</span>; <span class="keyword">// spurious interrupt</span>
|
<a name="l01170"></a>01170 <span class="vhdlchar">finished_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01170"></a>01170
|
<a name="l01171"></a>01171 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l01171"></a>01171 <span class="vhdlchar">finished_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01172"></a>01172 <span class="vhdlkeyword">end</span>
|
<a name="l01172"></a>01172 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l01173"></a>01173 <span class="vhdlkeyword">end</span>
|
<a name="l01173"></a>01173 <span class="vhdlkeyword">end</span>
|
<a name="l01174"></a>01174
|
<a name="l01174"></a>01174 <span class="vhdlkeyword">end</span>
|
<a name="l01175"></a>01175 <a class="code" href="classbus__control.html#abc89f2549e5275c60648fc9a94876e29">S_PC_0</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l01175"></a>01175
|
<a name="l01176"></a>01176 <a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01176"></a>01176 <a class="code" href="classbus__control.html#abc89f2549e5275c60648fc9a94876e29">S_PC_0</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l01177"></a>01177 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1'b1</span>) <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> <= <a class="code" href="classbus__control.html#a1dc6742718597d6e0ef98e8200bb49bf">FC_SUPERVISOR_PROGRAM</a>;
|
<a name="l01177"></a>01177 <a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01178"></a>01178 <span class="vhdlkeyword">else</span> <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> <= <a class="code" href="classbus__control.html#a80b93f8634a7f03a199836a78c52d9bb">FC_USER_PROGRAM</a>;
|
<a name="l01178"></a>01178 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1'b1</span>) <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> <= <a class="code" href="classbus__control.html#a1dc6742718597d6e0ef98e8200bb49bf">FC_SUPERVISOR_PROGRAM</a>;
|
<a name="l01179"></a>01179
|
<a name="l01179"></a>01179 <span class="vhdlkeyword">else</span> <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a> <= <a class="code" href="classbus__control.html#a80b93f8634a7f03a199836a78c52d9bb">FC_USER_PROGRAM</a>;
|
<a name="l01180"></a>01180 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01180"></a>01180
|
<a name="l01181"></a>01181 <span class="vhdlchar">prefetch_ir_valid_32_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01181"></a>01181 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01182"></a>01182 <span class="vhdlchar">prefetch_ir_valid_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01182"></a>01182 <span class="vhdlchar">prefetch_ir_valid_32_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01183"></a>01183 <span class="vhdlchar">prefetch_ir_valid_80_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01183"></a>01183 <span class="vhdlchar">prefetch_ir_valid_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01184"></a>01184
|
<a name="l01184"></a>01184 <span class="vhdlchar">prefetch_ir_valid_80_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01185"></a>01185 <span class="vhdlchar">fault_address_state_o</span> <= <span class="vhdlchar">pc_i</span>;
|
<a name="l01185"></a>01185
|
<a name="l01186"></a>01186 <span class="vhdlchar">rw_state_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01186"></a>01186 <span class="vhdlchar">fault_address_state_o</span> <= <span class="vhdlchar">pc_i</span>;
|
<a name="l01187"></a>01187 <span class="vhdlchar">fc_state_o</span> <= (<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1'b1</span>) ? <a class="code" href="classbus__control.html#a1dc6742718597d6e0ef98e8200bb49bf">FC_SUPERVISOR_PROGRAM</a> : <a class="code" href="classbus__control.html#a80b93f8634a7f03a199836a78c52d9bb">FC_USER_PROGRAM</a>;
|
<a name="l01187"></a>01187 <span class="vhdlchar">rw_state_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01188"></a>01188 <span class="vhdlchar">interrupt_trap_o</span> <= <a class="code" href="classbus__control.html#a16c432fa4a9897426aab6df04ee608e0">VECTOR_ADDRESS_TRAP</a>;
|
<a name="l01188"></a>01188 <span class="vhdlchar">fc_state_o</span> <= (<span class="vhdlchar">supervisor_i</span> == <span class="vhdllogic">1'b1</span>) ? <a class="code" href="classbus__control.html#a1dc6742718597d6e0ef98e8200bb49bf">FC_SUPERVISOR_PROGRAM</a> : <a class="code" href="classbus__control.html#a80b93f8634a7f03a199836a78c52d9bb">FC_USER_PROGRAM</a>;
|
<a name="l01189"></a>01189
|
<a name="l01189"></a>01189 <span class="vhdlchar">interrupt_trap_o</span> <= <a class="code" href="classbus__control.html#a16c432fa4a9897426aab6df04ee608e0">VECTOR_ADDRESS_TRAP</a>;
|
<a name="l01190"></a>01190 <span class="vhdlchar">jmp_address_trap_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01190"></a>01190
|
<a name="l01191"></a>01191 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l01191"></a>01191 <span class="vhdlchar">jmp_address_trap_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01192"></a>01192 <span class="vhdlkeyword">end</span>
|
<a name="l01192"></a>01192 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l01193"></a>01193 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
<a name="l01193"></a>01193 <span class="vhdlkeyword">end</span>
|
<a name="l01194"></a>01194 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01194"></a>01194 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
<a name="l01195"></a>01195
|
<a name="l01195"></a>01195 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01196"></a>01196 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">prefetch_ir_valid_32_o</span> == <span class="vhdllogic">1'b0</span>) <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> <= <span class="vhdlchar">pc_i</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
|
<a name="l01196"></a>01196
|
<a name="l01197"></a>01197 <span class="vhdlkeyword">else</span> <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> <= <a class="code" href="classbus__control.html#a96afbad4fe8073f7c58baf255b66c944">pc_i_plus_6</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
|
<a name="l01197"></a>01197 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">prefetch_ir_valid_32_o</span> == <span class="vhdllogic">1'b0</span>) <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> <= <span class="vhdlchar">pc_i</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
|
<a name="l01198"></a>01198
|
<a name="l01198"></a>01198 <span class="vhdlkeyword">else</span> <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> <= <a class="code" href="classbus__control.html#a96afbad4fe8073f7c58baf255b66c944">pc_i_plus_6</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
|
<a name="l01199"></a>01199 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> <= (<span class="vhdlchar">pc_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b10</span>)? <span class="vhdllogic">4'b0011</span> :
|
<a name="l01199"></a>01199
|
<a name="l01200"></a>01200 <span class="vhdllogic">4'b1111</span>;
|
<a name="l01200"></a>01200 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> <= (<span class="vhdlchar">pc_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b10</span>)? <span class="vhdllogic">4'b0011</span> :
|
<a name="l01201"></a>01201 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01201"></a>01201 <span class="vhdllogic">4'b1111</span>;
|
<a name="l01202"></a>01202
|
<a name="l01202"></a>01202 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01203"></a>01203 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">prefetch_ir_valid_32_o</span> == <span class="vhdllogic">1'b0</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01203"></a>01203
|
<a name="l01204"></a>01204 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01204"></a>01204 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">prefetch_ir_valid_32_o</span> == <span class="vhdllogic">1'b0</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01205"></a>01205 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01205"></a>01205 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01206"></a>01206 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01206"></a>01206 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01207"></a>01207 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> <= <a class="code" href="classbus__control.html#a9c7e8a6d030ee1f404d7526ebda509ca">CTI_INCR_CYCLE</a>;
|
<a name="l01207"></a>01207 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01208"></a>01208 <span class="vhdlkeyword">end</span>
|
<a name="l01208"></a>01208 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> <= <a class="code" href="classbus__control.html#a9c7e8a6d030ee1f404d7526ebda509ca">CTI_INCR_CYCLE</a>;
|
<a name="l01209"></a>01209 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
<a name="l01209"></a>01209 <span class="vhdlkeyword">end</span>
|
<a name="l01210"></a>01210 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01210"></a>01210 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
<a name="l01211"></a>01211 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01211"></a>01211 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01212"></a>01212 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01212"></a>01212 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01213"></a>01213 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> <= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
|
<a name="l01213"></a>01213 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01214"></a>01214 <span class="vhdlkeyword">end</span>
|
<a name="l01214"></a>01214 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> <= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
|
<a name="l01215"></a>01215
|
<a name="l01215"></a>01215 <span class="vhdlkeyword">end</span>
|
<a name="l01216"></a>01216 <a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> <= <span class="vhdlchar">pc_change_i</span>;
|
<a name="l01216"></a>01216
|
<a name="l01217"></a>01217 <span class="vhdlchar">prefetch_ir_valid_32_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01217"></a>01217 <a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> <= <span class="vhdlchar">pc_change_i</span>;
|
<a name="l01218"></a>01218
|
<a name="l01218"></a>01218 <span class="vhdlchar">prefetch_ir_valid_32_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01219"></a>01219 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a729095d9bb813c82aee565216b092f38">S_PC_1</a>;
|
<a name="l01219"></a>01219
|
<a name="l01220"></a>01220 <span class="vhdlkeyword">end</span>
|
<a name="l01220"></a>01220 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a729095d9bb813c82aee565216b092f38">S_PC_1</a>;
|
<a name="l01221"></a>01221 <span class="vhdlkeyword">end</span>
|
<a name="l01221"></a>01221 <span class="vhdlkeyword">end</span>
|
<a name="l01222"></a>01222
|
<a name="l01222"></a>01222 <span class="vhdlkeyword">end</span>
|
<a name="l01223"></a>01223 <a class="code" href="classbus__control.html#a729095d9bb813c82aee565216b092f38">S_PC_1</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l01223"></a>01223
|
<a name="l01224"></a>01224 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_change_i</span> != <span class="vhdllogic">2'b00</span>) <a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> <= <span class="vhdlchar">pc_change_i</span>;
|
<a name="l01224"></a>01224 <a class="code" href="classbus__control.html#a729095d9bb813c82aee565216b092f38">S_PC_1</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l01225"></a>01225
|
<a name="l01225"></a>01225 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_change_i</span> != <span class="vhdllogic">2'b00</span>) <a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> <= <span class="vhdlchar">pc_change_i</span>;
|
<a name="l01226"></a>01226 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01226"></a>01226
|
<a name="l01227"></a>01227 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> == <a class="code" href="classbus__control.html#a9c7e8a6d030ee1f404d7526ebda509ca">CTI_INCR_CYCLE</a>) <span class="vhdlkeyword">begin</span>
|
<a name="l01227"></a>01227 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01228"></a>01228 <span class="keyword">//CYC_O <= 1'b1;</span>
|
<a name="l01228"></a>01228 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> == <a class="code" href="classbus__control.html#a9c7e8a6d030ee1f404d7526ebda509ca">CTI_INCR_CYCLE</a>) <span class="vhdlkeyword">begin</span>
|
<a name="l01229"></a>01229 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> <= <a class="code" href="classbus__control.html#addb6490ae2acff8c93b321b1e14c7bd4">pc_i_plus_4</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
|
<a name="l01229"></a>01229 <span class="keyword">//CYC_O <= 1'b1;</span>
|
<a name="l01230"></a>01230 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> <= <span class="vhdllogic">4'b1111</span>;
|
<a name="l01230"></a>01230 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> <= <a class="code" href="classbus__control.html#addb6490ae2acff8c93b321b1e14c7bd4">pc_i_plus_4</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
|
<a name="l01231"></a>01231 <span class="keyword">//STB_O <= 1'b1;</span>
|
<a name="l01231"></a>01231 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> <= <span class="vhdllogic">4'b1111</span>;
|
<a name="l01232"></a>01232 <span class="keyword">//WE_O <= 1'b0;</span>
|
<a name="l01232"></a>01232 <span class="keyword">//STB_O <= 1'b1;</span>
|
<a name="l01233"></a>01233
|
<a name="l01233"></a>01233 <span class="keyword">//WE_O <= 1'b0;</span>
|
<a name="l01234"></a>01234 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b10</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01234"></a>01234
|
<a name="l01235"></a>01235 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01235"></a>01235 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b10</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01236"></a>01236 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01236"></a>01236 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01237"></a>01237 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01237"></a>01237 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01238"></a>01238 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> <= <a class="code" href="classbus__control.html#a9c7e8a6d030ee1f404d7526ebda509ca">CTI_INCR_CYCLE</a>;
|
<a name="l01238"></a>01238 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01239"></a>01239 <span class="vhdlkeyword">end</span>
|
<a name="l01239"></a>01239 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> <= <a class="code" href="classbus__control.html#a9c7e8a6d030ee1f404d7526ebda509ca">CTI_INCR_CYCLE</a>;
|
<a name="l01240"></a>01240 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
<a name="l01240"></a>01240 <span class="vhdlkeyword">end</span>
|
<a name="l01241"></a>01241 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01241"></a>01241 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
<a name="l01242"></a>01242 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01242"></a>01242 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01243"></a>01243 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01243"></a>01243 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01244"></a>01244 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> <= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
|
<a name="l01244"></a>01244 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01245"></a>01245 <span class="vhdlkeyword">end</span>
|
<a name="l01245"></a>01245 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> <= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
|
<a name="l01246"></a>01246
|
<a name="l01246"></a>01246 <span class="vhdlkeyword">end</span>
|
<a name="l01247"></a>01247 <span class="keyword">//if(supervisor_i == 1'b1) fc_o <= FC_SUPERVISOR_PROGRAM;</span>
|
<a name="l01247"></a>01247
|
<a name="l01248"></a>01248 <span class="keyword">//else fc_o <= FC_USER_PROGRAM;</span>
|
<a name="l01248"></a>01248 <span class="keyword">//if(supervisor_i == 1'b1) fc_o <= FC_SUPERVISOR_PROGRAM;</span>
|
<a name="l01249"></a>01249
|
<a name="l01249"></a>01249 <span class="keyword">//else fc_o <= FC_USER_PROGRAM;</span>
|
<a name="l01250"></a>01250 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b10</span>) <span class="vhdlchar">prefetch_ir_o</span> <= { <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">64'b0</span> };
|
<a name="l01250"></a>01250
|
<a name="l01251"></a>01251 <span class="vhdlkeyword">else</span> <span class="vhdlchar">prefetch_ir_o</span> <= { <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">48'b0</span> };
|
<a name="l01251"></a>01251 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b10</span>) <span class="vhdlchar">prefetch_ir_o</span> <= { <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">64'b0</span> };
|
<a name="l01252"></a>01252
|
<a name="l01252"></a>01252 <span class="vhdlkeyword">else</span> <span class="vhdlchar">prefetch_ir_o</span> <= { <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">48'b0</span> };
|
<a name="l01253"></a>01253 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a28895ce8a15bd607103ea20914434342">S_PC_3</a>;
|
<a name="l01253"></a>01253
|
<a name="l01254"></a>01254 <span class="vhdlkeyword">end</span>
|
<a name="l01254"></a>01254 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a28895ce8a15bd607103ea20914434342">S_PC_3</a>;
|
<a name="l01255"></a>01255 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
<a name="l01255"></a>01255 <span class="vhdlkeyword">end</span>
|
<a name="l01256"></a>01256 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01256"></a>01256 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
<a name="l01257"></a>01257 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01257"></a>01257 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01258"></a>01258
|
<a name="l01258"></a>01258 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01259"></a>01259 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> == <span class="vhdllogic">2'b10</span> || <a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> == <span class="vhdllogic">2'b11</span> || <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2'b10</span> || <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2'b11</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01259"></a>01259
|
<a name="l01260"></a>01260 <span class="keyword">// load 4 words: [79:16] in 2,3 cycles</span>
|
<a name="l01260"></a>01260 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> == <span class="vhdllogic">2'b10</span> || <a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> == <span class="vhdllogic">2'b11</span> || <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2'b10</span> || <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2'b11</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01261"></a>01261 <span class="vhdlchar">prefetch_ir_valid_32_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01261"></a>01261 <span class="keyword">// load 4 words: [79:16] in 2,3 cycles</span>
|
<a name="l01262"></a>01262 <span class="vhdlchar">prefetch_ir_valid_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01262"></a>01262 <span class="vhdlchar">prefetch_ir_valid_32_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01263"></a>01263 <span class="vhdlchar">prefetch_ir_valid_80_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01263"></a>01263 <span class="vhdlchar">prefetch_ir_valid_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01264"></a>01264
|
<a name="l01264"></a>01264 <span class="vhdlchar">prefetch_ir_valid_80_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01265"></a>01265 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#abc89f2549e5275c60648fc9a94876e29">S_PC_0</a>;
|
<a name="l01265"></a>01265
|
<a name="l01266"></a>01266 <span class="vhdlkeyword">end</span>
|
<a name="l01266"></a>01266 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#abc89f2549e5275c60648fc9a94876e29">S_PC_0</a>;
|
<a name="l01267"></a>01267 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> == <span class="vhdllogic">2'b01</span> || <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2'b01</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01267"></a>01267 <span class="vhdlkeyword">end</span>
|
<a name="l01268"></a>01268 <span class="keyword">// do not load any words</span>
|
<a name="l01268"></a>01268 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#a9d1ac811b477c31c0d6aec541dca418d">saved_pc_change</a> == <span class="vhdllogic">2'b01</span> || <span class="vhdlchar">pc_change_i</span> == <span class="vhdllogic">2'b01</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01269"></a>01269 <span class="vhdlchar">prefetch_ir_valid_32_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01269"></a>01269 <span class="keyword">// do not load any words</span>
|
<a name="l01270"></a>01270 <span class="vhdlchar">prefetch_ir_valid_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01270"></a>01270 <span class="vhdlchar">prefetch_ir_valid_32_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01271"></a>01271 <span class="vhdlchar">prefetch_ir_valid_80_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01271"></a>01271 <span class="vhdlchar">prefetch_ir_valid_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01272"></a>01272
|
<a name="l01272"></a>01272 <span class="vhdlchar">prefetch_ir_valid_80_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01273"></a>01273 <span class="vhdlchar">prefetch_ir_o</span> <= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">63</span>:<span class="vhdllogic">32</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16'b0</span> };
|
<a name="l01273"></a>01273
|
<a name="l01274"></a>01274 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
|
<a name="l01274"></a>01274 <span class="vhdlchar">prefetch_ir_o</span> <= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">63</span>:<span class="vhdllogic">32</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16'b0</span> };
|
<a name="l01275"></a>01275 <span class="vhdlkeyword">end</span>
|
<a name="l01275"></a>01275 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
|
<a name="l01276"></a>01276 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
<a name="l01276"></a>01276 <span class="vhdlkeyword">end</span>
|
<a name="l01277"></a>01277 <span class="vhdlchar">prefetch_ir_valid_32_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01277"></a>01277 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
<a name="l01278"></a>01278 <span class="vhdlchar">prefetch_ir_valid_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01278"></a>01278 <span class="vhdlchar">prefetch_ir_valid_32_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01279"></a>01279 <span class="vhdlchar">prefetch_ir_valid_80_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01279"></a>01279 <span class="vhdlchar">prefetch_ir_valid_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01280"></a>01280
|
<a name="l01280"></a>01280 <span class="vhdlchar">prefetch_ir_valid_80_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01281"></a>01281 <span class="vhdlchar">prefetch_ir_o</span> <= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">79</span>:<span class="vhdllogic">32</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] };
|
<a name="l01281"></a>01281
|
<a name="l01282"></a>01282 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
|
<a name="l01282"></a>01282 <span class="vhdlchar">prefetch_ir_o</span> <= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">79</span>:<span class="vhdllogic">32</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] };
|
<a name="l01283"></a>01283 <span class="vhdlkeyword">end</span>
|
<a name="l01283"></a>01283 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
|
<a name="l01284"></a>01284 <span class="vhdlkeyword">end</span>
|
<a name="l01284"></a>01284 <span class="vhdlkeyword">end</span>
|
<a name="l01285"></a>01285 <span class="vhdlkeyword">end</span>
|
<a name="l01285"></a>01285 <span class="vhdlkeyword">end</span>
|
<a name="l01286"></a>01286 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01286"></a>01286 <span class="vhdlkeyword">end</span>
|
<a name="l01287"></a>01287 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01287"></a>01287 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01288"></a>01288 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01288"></a>01288 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01289"></a>01289
|
<a name="l01289"></a>01289 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01290"></a>01290 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#aaa3088e2e223cdc5551d535c3739cad5">S_PC_2</a>;
|
<a name="l01290"></a>01290
|
<a name="l01291"></a>01291 <span class="vhdlkeyword">end</span>
|
<a name="l01291"></a>01291 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#aaa3088e2e223cdc5551d535c3739cad5">S_PC_2</a>;
|
<a name="l01292"></a>01292 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01292"></a>01292 <span class="vhdlkeyword">end</span>
|
<a name="l01293"></a>01293 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01293"></a>01293 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01294"></a>01294 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01294"></a>01294 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01295"></a>01295
|
<a name="l01295"></a>01295 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01296"></a>01296 <span class="vhdlchar">fault_address_state_o</span> <= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2'b00</span> };
|
<a name="l01296"></a>01296
|
<a name="l01297"></a>01297 <span class="vhdlchar">rw_state_o</span> <= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
|
<a name="l01297"></a>01297 <span class="vhdlchar">fault_address_state_o</span> <= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2'b00</span> };
|
<a name="l01298"></a>01298 <span class="vhdlchar">fc_state_o</span> <= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
|
<a name="l01298"></a>01298 <span class="vhdlchar">rw_state_o</span> <= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
|
<a name="l01299"></a>01299 <span class="vhdlchar">interrupt_trap_o</span> <= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
|
<a name="l01299"></a>01299 <span class="vhdlchar">fc_state_o</span> <= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
|
<a name="l01300"></a>01300
|
<a name="l01300"></a>01300 <span class="vhdlchar">interrupt_trap_o</span> <= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
|
<a name="l01301"></a>01301 <span class="vhdlchar">jmp_bus_trap_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01301"></a>01301
|
<a name="l01302"></a>01302 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l01302"></a>01302 <span class="vhdlchar">jmp_bus_trap_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01303"></a>01303 <span class="vhdlkeyword">end</span>
|
<a name="l01303"></a>01303 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l01304"></a>01304 <span class="vhdlkeyword">end</span>
|
<a name="l01304"></a>01304 <span class="vhdlkeyword">end</span>
|
<a name="l01305"></a>01305 <a class="code" href="classbus__control.html#aaa3088e2e223cdc5551d535c3739cad5">S_PC_2</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l01305"></a>01305 <span class="vhdlkeyword">end</span>
|
<a name="l01306"></a>01306 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01306"></a>01306 <a class="code" href="classbus__control.html#aaa3088e2e223cdc5551d535c3739cad5">S_PC_2</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l01307"></a>01307 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01307"></a>01307 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01308"></a>01308
|
<a name="l01308"></a>01308 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01309"></a>01309 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a729095d9bb813c82aee565216b092f38">S_PC_1</a>;
|
<a name="l01309"></a>01309
|
<a name="l01310"></a>01310 <span class="vhdlkeyword">end</span>
|
<a name="l01310"></a>01310 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a729095d9bb813c82aee565216b092f38">S_PC_1</a>;
|
<a name="l01311"></a>01311 <a class="code" href="classbus__control.html#a28895ce8a15bd607103ea20914434342">S_PC_3</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l01311"></a>01311 <span class="vhdlkeyword">end</span>
|
<a name="l01312"></a>01312 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01312"></a>01312 <a class="code" href="classbus__control.html#a28895ce8a15bd607103ea20914434342">S_PC_3</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l01313"></a>01313 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b10</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01313"></a>01313 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01314"></a>01314 <span class="keyword">//CYC_O <= 1'b1;</span>
|
<a name="l01314"></a>01314 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">pc_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b10</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01315"></a>01315 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> <= <a class="code" href="classbus__control.html#a96afbad4fe8073f7c58baf255b66c944">pc_i_plus_6</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
|
<a name="l01315"></a>01315 <span class="keyword">//CYC_O <= 1'b1;</span>
|
<a name="l01316"></a>01316 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> <= <span class="vhdllogic">4'b1111</span>;
|
<a name="l01316"></a>01316 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> <= <a class="code" href="classbus__control.html#a96afbad4fe8073f7c58baf255b66c944">pc_i_plus_6</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
|
<a name="l01317"></a>01317 <span class="keyword">//STB_O <= 1'b1;</span>
|
<a name="l01317"></a>01317 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> <= <span class="vhdllogic">4'b1111</span>;
|
<a name="l01318"></a>01318 <span class="keyword">//WE_O <= 1'b0;</span>
|
<a name="l01318"></a>01318 <span class="keyword">//STB_O <= 1'b1;</span>
|
<a name="l01319"></a>01319
|
<a name="l01319"></a>01319 <span class="keyword">//WE_O <= 1'b0;</span>
|
<a name="l01320"></a>01320 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01320"></a>01320
|
<a name="l01321"></a>01321 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01321"></a>01321 <a class="code" href="classbus__control.html#aae2a079b8db9e4631c16bcf5adac9291">SGL_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01322"></a>01322 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01322"></a>01322 <a class="code" href="classbus__control.html#a7b17f75c0d89e01e582ef03415312775">BLK_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01323"></a>01323 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> <= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
|
<a name="l01323"></a>01323 <a class="code" href="classbus__control.html#ab953355fe090ce478d166356b9cf085d">RMW_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01324"></a>01324
|
<a name="l01324"></a>01324 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> <= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
|
<a name="l01325"></a>01325 <span class="keyword">//if(supervisor_i == 1'b1) fc_o <= FC_SUPERVISOR_PROGRAM;</span>
|
<a name="l01325"></a>01325
|
<a name="l01326"></a>01326 <span class="keyword">//else fc_o <= FC_USER_PROGRAM;</span>
|
<a name="l01326"></a>01326 <span class="keyword">//if(supervisor_i == 1'b1) fc_o <= FC_SUPERVISOR_PROGRAM;</span>
|
<a name="l01327"></a>01327
|
<a name="l01327"></a>01327 <span class="keyword">//else fc_o <= FC_USER_PROGRAM;</span>
|
<a name="l01328"></a>01328 <span class="vhdlchar">prefetch_ir_o</span> <= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">79</span>:<span class="vhdllogic">64</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">32'b0</span> };
|
<a name="l01328"></a>01328
|
<a name="l01329"></a>01329
|
<a name="l01329"></a>01329 <span class="vhdlchar">prefetch_ir_o</span> <= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">79</span>:<span class="vhdllogic">64</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">32'b0</span> };
|
<a name="l01330"></a>01330 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#aa19b7d76f1e25fd78b158b98088bd82a">S_PC_5</a>;
|
<a name="l01330"></a>01330
|
<a name="l01331"></a>01331 <span class="vhdlkeyword">end</span>
|
<a name="l01331"></a>01331 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#aa19b7d76f1e25fd78b158b98088bd82a">S_PC_5</a>;
|
<a name="l01332"></a>01332 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
<a name="l01332"></a>01332 <span class="vhdlkeyword">end</span>
|
<a name="l01333"></a>01333 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01333"></a>01333 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
<a name="l01334"></a>01334 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01334"></a>01334 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01335"></a>01335
|
<a name="l01335"></a>01335 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01336"></a>01336 <span class="vhdlchar">prefetch_ir_o</span> <= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">79</span>:<span class="vhdllogic">48</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16'b0</span> };
|
<a name="l01336"></a>01336
|
<a name="l01337"></a>01337
|
<a name="l01337"></a>01337 <span class="vhdlchar">prefetch_ir_o</span> <= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">79</span>:<span class="vhdllogic">48</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16'b0</span> };
|
<a name="l01338"></a>01338 <span class="vhdlchar">prefetch_ir_valid_32_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01338"></a>01338
|
<a name="l01339"></a>01339 <span class="vhdlchar">prefetch_ir_valid_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01339"></a>01339 <span class="vhdlchar">prefetch_ir_valid_32_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01340"></a>01340 <span class="vhdlchar">prefetch_ir_valid_80_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01340"></a>01340 <span class="vhdlchar">prefetch_ir_valid_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01341"></a>01341 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
|
<a name="l01341"></a>01341 <span class="vhdlchar">prefetch_ir_valid_80_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01342"></a>01342 <span class="vhdlkeyword">end</span>
|
<a name="l01342"></a>01342 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
|
<a name="l01343"></a>01343 <span class="vhdlkeyword">end</span>
|
<a name="l01343"></a>01343 <span class="vhdlkeyword">end</span>
|
<a name="l01344"></a>01344 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01344"></a>01344 <span class="vhdlkeyword">end</span>
|
<a name="l01345"></a>01345 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01345"></a>01345 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01346"></a>01346 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01346"></a>01346 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01347"></a>01347
|
<a name="l01347"></a>01347 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01348"></a>01348 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a5e72ed7bc2e7991094fecd272775f92c">S_PC_4</a>;
|
<a name="l01348"></a>01348
|
<a name="l01349"></a>01349 <span class="vhdlkeyword">end</span>
|
<a name="l01349"></a>01349 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a5e72ed7bc2e7991094fecd272775f92c">S_PC_4</a>;
|
<a name="l01350"></a>01350 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01350"></a>01350 <span class="vhdlkeyword">end</span>
|
<a name="l01351"></a>01351 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01351"></a>01351 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01352"></a>01352 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01352"></a>01352 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01353"></a>01353
|
<a name="l01353"></a>01353 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01354"></a>01354 <span class="vhdlchar">fault_address_state_o</span> <= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2'b00</span> };
|
<a name="l01354"></a>01354
|
<a name="l01355"></a>01355 <span class="vhdlchar">rw_state_o</span> <= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
|
<a name="l01355"></a>01355 <span class="vhdlchar">fault_address_state_o</span> <= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2'b00</span> };
|
<a name="l01356"></a>01356 <span class="vhdlchar">fc_state_o</span> <= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
|
<a name="l01356"></a>01356 <span class="vhdlchar">rw_state_o</span> <= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
|
<a name="l01357"></a>01357 <span class="vhdlchar">interrupt_trap_o</span> <= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
|
<a name="l01357"></a>01357 <span class="vhdlchar">fc_state_o</span> <= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
|
<a name="l01358"></a>01358
|
<a name="l01358"></a>01358 <span class="vhdlchar">interrupt_trap_o</span> <= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
|
<a name="l01359"></a>01359 <span class="vhdlchar">jmp_bus_trap_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01359"></a>01359
|
<a name="l01360"></a>01360 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l01360"></a>01360 <span class="vhdlchar">jmp_bus_trap_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01361"></a>01361 <span class="vhdlkeyword">end</span>
|
<a name="l01361"></a>01361 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l01362"></a>01362 <span class="vhdlkeyword">end</span>
|
<a name="l01362"></a>01362 <span class="vhdlkeyword">end</span>
|
<a name="l01363"></a>01363 <a class="code" href="classbus__control.html#a5e72ed7bc2e7991094fecd272775f92c">S_PC_4</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l01363"></a>01363 <span class="vhdlkeyword">end</span>
|
<a name="l01364"></a>01364 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01364"></a>01364 <a class="code" href="classbus__control.html#a5e72ed7bc2e7991094fecd272775f92c">S_PC_4</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l01365"></a>01365 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01365"></a>01365 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01366"></a>01366
|
<a name="l01366"></a>01366 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01367"></a>01367 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a28895ce8a15bd607103ea20914434342">S_PC_3</a>;
|
<a name="l01367"></a>01367
|
<a name="l01368"></a>01368 <span class="vhdlkeyword">end</span>
|
<a name="l01368"></a>01368 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a28895ce8a15bd607103ea20914434342">S_PC_3</a>;
|
<a name="l01369"></a>01369 <a class="code" href="classbus__control.html#aa19b7d76f1e25fd78b158b98088bd82a">S_PC_5</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l01369"></a>01369 <span class="vhdlkeyword">end</span>
|
<a name="l01370"></a>01370 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01370"></a>01370 <a class="code" href="classbus__control.html#aa19b7d76f1e25fd78b158b98088bd82a">S_PC_5</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l01371"></a>01371 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01371"></a>01371 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01372"></a>01372 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01372"></a>01372 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01373"></a>01373
|
<a name="l01373"></a>01373 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01374"></a>01374 <span class="vhdlchar">prefetch_ir_o</span> <= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">79</span>:<span class="vhdllogic">32</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] };
|
<a name="l01374"></a>01374
|
<a name="l01375"></a>01375
|
<a name="l01375"></a>01375 <span class="vhdlchar">prefetch_ir_o</span> <= { <span class="vhdlchar">prefetch_ir_o</span>[<span class="vhdllogic">79</span>:<span class="vhdllogic">32</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>] };
|
<a name="l01376"></a>01376 <span class="vhdlchar">prefetch_ir_valid_32_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01376"></a>01376
|
<a name="l01377"></a>01377 <span class="vhdlchar">prefetch_ir_valid_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01377"></a>01377 <span class="vhdlchar">prefetch_ir_valid_32_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01378"></a>01378 <span class="vhdlchar">prefetch_ir_valid_80_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01378"></a>01378 <span class="vhdlchar">prefetch_ir_valid_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01379"></a>01379 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
|
<a name="l01379"></a>01379 <span class="vhdlchar">prefetch_ir_valid_80_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01380"></a>01380 <span class="vhdlkeyword">end</span>
|
<a name="l01380"></a>01380 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
|
<a name="l01381"></a>01381 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01381"></a>01381 <span class="vhdlkeyword">end</span>
|
<a name="l01382"></a>01382 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01382"></a>01382 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01383"></a>01383 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01383"></a>01383 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01384"></a>01384
|
<a name="l01384"></a>01384 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01385"></a>01385 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a1c803cc4a4f514cd4027a798d9236e5e">S_PC_6</a>;
|
<a name="l01385"></a>01385
|
<a name="l01386"></a>01386 <span class="vhdlkeyword">end</span>
|
<a name="l01386"></a>01386 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a1c803cc4a4f514cd4027a798d9236e5e">S_PC_6</a>;
|
<a name="l01387"></a>01387 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01387"></a>01387 <span class="vhdlkeyword">end</span>
|
<a name="l01388"></a>01388 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01388"></a>01388 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01389"></a>01389 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01389"></a>01389 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01390"></a>01390
|
<a name="l01390"></a>01390 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01391"></a>01391 <span class="vhdlchar">fault_address_state_o</span> <= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2'b00</span> };
|
<a name="l01391"></a>01391
|
<a name="l01392"></a>01392 <span class="vhdlchar">rw_state_o</span> <= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
|
<a name="l01392"></a>01392 <span class="vhdlchar">fault_address_state_o</span> <= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2'b00</span> };
|
<a name="l01393"></a>01393 <span class="vhdlchar">fc_state_o</span> <= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
|
<a name="l01393"></a>01393 <span class="vhdlchar">rw_state_o</span> <= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
|
<a name="l01394"></a>01394 <span class="vhdlchar">interrupt_trap_o</span> <= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
|
<a name="l01394"></a>01394 <span class="vhdlchar">fc_state_o</span> <= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
|
<a name="l01395"></a>01395
|
<a name="l01395"></a>01395 <span class="vhdlchar">interrupt_trap_o</span> <= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
|
<a name="l01396"></a>01396 <span class="vhdlchar">jmp_bus_trap_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01396"></a>01396
|
<a name="l01397"></a>01397 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l01397"></a>01397 <span class="vhdlchar">jmp_bus_trap_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01398"></a>01398 <span class="vhdlkeyword">end</span>
|
<a name="l01398"></a>01398 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l01399"></a>01399 <span class="vhdlkeyword">end</span>
|
<a name="l01399"></a>01399 <span class="vhdlkeyword">end</span>
|
<a name="l01400"></a>01400 <a class="code" href="classbus__control.html#a1c803cc4a4f514cd4027a798d9236e5e">S_PC_6</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l01400"></a>01400 <span class="vhdlkeyword">end</span>
|
<a name="l01401"></a>01401 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01401"></a>01401 <a class="code" href="classbus__control.html#a1c803cc4a4f514cd4027a798d9236e5e">S_PC_6</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l01402"></a>01402 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01402"></a>01402 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01403"></a>01403
|
<a name="l01403"></a>01403 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01404"></a>01404 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#aa19b7d76f1e25fd78b158b98088bd82a">S_PC_5</a>;
|
<a name="l01404"></a>01404
|
<a name="l01405"></a>01405 <span class="vhdlkeyword">end</span>
|
<a name="l01405"></a>01405 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#aa19b7d76f1e25fd78b158b98088bd82a">S_PC_5</a>;
|
<a name="l01406"></a>01406
|
<a name="l01406"></a>01406 <span class="vhdlkeyword">end</span>
|
<a name="l01407"></a>01407 <span class="keyword">//*******************</span>
|
<a name="l01407"></a>01407
|
<a name="l01408"></a>01408 <a class="code" href="classbus__control.html#af752b2515eb632068e26865f1569598c">S_READ_1</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l01408"></a>01408 <span class="keyword">//*******************</span>
|
<a name="l01409"></a>01409 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01409"></a>01409 <a class="code" href="classbus__control.html#af752b2515eb632068e26865f1569598c">S_READ_1</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l01410"></a>01410 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b10</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01410"></a>01410 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01411"></a>01411 <span class="keyword">//CYC_O <= 1'b1;</span>
|
<a name="l01411"></a>01411 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b10</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01412"></a>01412 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> <= <a class="code" href="classbus__control.html#a2997069937ed71fba6eefb8837ba3282">address_i_plus_4</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
|
<a name="l01412"></a>01412 <span class="keyword">//CYC_O <= 1'b1;</span>
|
<a name="l01413"></a>01413 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> <= <span class="vhdllogic">4'b1100</span>;
|
<a name="l01413"></a>01413 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> <= <a class="code" href="classbus__control.html#a2997069937ed71fba6eefb8837ba3282">address_i_plus_4</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
|
<a name="l01414"></a>01414 <span class="keyword">//STB_O <= 1'b1;</span>
|
<a name="l01414"></a>01414 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> <= <span class="vhdllogic">4'b1100</span>;
|
<a name="l01415"></a>01415 <span class="keyword">//WE_O <= 1'b0;</span>
|
<a name="l01415"></a>01415 <span class="keyword">//STB_O <= 1'b1;</span>
|
<a name="l01416"></a>01416
|
<a name="l01416"></a>01416 <span class="keyword">//WE_O <= 1'b0;</span>
|
<a name="l01417"></a>01417 <span class="keyword">//SGL_O <= 1'b0;</span>
|
<a name="l01417"></a>01417
|
<a name="l01418"></a>01418 <span class="keyword">//BLK_O <= 1'b1;</span>
|
<a name="l01418"></a>01418 <span class="keyword">//SGL_O <= 1'b0;</span>
|
<a name="l01419"></a>01419 <span class="keyword">//RMW_O <= 1'b0;</span>
|
<a name="l01419"></a>01419 <span class="keyword">//BLK_O <= 1'b1;</span>
|
<a name="l01420"></a>01420 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> <= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
|
<a name="l01420"></a>01420 <span class="keyword">//RMW_O <= 1'b0;</span>
|
<a name="l01421"></a>01421
|
<a name="l01421"></a>01421 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> <= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
|
<a name="l01422"></a>01422 <span class="keyword">//if(supervisor_i == 1'b1) fc_o <= (address_type_i == 1'b0) ? FC_SUPERVISOR_DATA : FC_SUPERVISOR_PROGRAM;</span>
|
<a name="l01422"></a>01422
|
<a name="l01423"></a>01423 <span class="keyword">//else fc_o <= (address_type_i == 1'b0) ? FC_USER_DATA : FC_USER_PROGRAM;</span>
|
<a name="l01423"></a>01423 <span class="keyword">//if(supervisor_i == 1'b1) fc_o <= (address_type_i == 1'b0) ? FC_SUPERVISOR_DATA : FC_SUPERVISOR_PROGRAM;</span>
|
<a name="l01424"></a>01424
|
<a name="l01424"></a>01424 <span class="keyword">//else fc_o <= (address_type_i == 1'b0) ? FC_USER_DATA : FC_USER_PROGRAM;</span>
|
<a name="l01425"></a>01425 <span class="vhdlchar">data_read_o</span> <= { <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16'b0</span> };
|
<a name="l01425"></a>01425
|
<a name="l01426"></a>01426
|
<a name="l01426"></a>01426 <span class="vhdlchar">data_read_o</span> <= { <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16'b0</span> };
|
<a name="l01427"></a>01427 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a269161b7fabba2e00d3a3a5153a9620e">S_READ_2</a>;
|
<a name="l01427"></a>01427
|
<a name="l01428"></a>01428 <span class="vhdlkeyword">end</span>
|
<a name="l01428"></a>01428 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a269161b7fabba2e00d3a3a5153a9620e">S_READ_2</a>;
|
<a name="l01429"></a>01429 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
<a name="l01429"></a>01429 <span class="vhdlkeyword">end</span>
|
<a name="l01430"></a>01430 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">read_modify_write_i</span> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01430"></a>01430 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
<a name="l01431"></a>01431 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01431"></a>01431 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">read_modify_write_i</span> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01432"></a>01432 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01432"></a>01432 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01433"></a>01433 <span class="vhdlkeyword">end</span>
|
<a name="l01433"></a>01433 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01434"></a>01434 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
<a name="l01434"></a>01434 <span class="vhdlkeyword">end</span>
|
<a name="l01435"></a>01435 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01435"></a>01435 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
<a name="l01436"></a>01436 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01436"></a>01436 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01437"></a>01437 <span class="vhdlkeyword">end</span>
|
<a name="l01437"></a>01437 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01438"></a>01438
|
<a name="l01438"></a>01438 <span class="vhdlkeyword">end</span>
|
<a name="l01439"></a>01439 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b00</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlchar">data_read_o</span> <= <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
|
<a name="l01439"></a>01439
|
<a name="l01440"></a>01440 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b10</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlchar">data_read_o</span> <= { {<span class="vhdllogic">16</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] };
|
<a name="l01440"></a>01440 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b00</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlchar">data_read_o</span> <= <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">0</span>];
|
<a name="l01441"></a>01441 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b00</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlchar">data_read_o</span> <= { {<span class="vhdllogic">16</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>] };
|
<a name="l01441"></a>01441 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b10</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlchar">data_read_o</span> <= { {<span class="vhdllogic">16</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>] };
|
<a name="l01442"></a>01442 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b11</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlchar">data_read_o</span> <= { {<span class="vhdllogic">24</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">7</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] };
|
<a name="l01442"></a>01442 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b00</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">1</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlchar">data_read_o</span> <= { {<span class="vhdllogic">16</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>] };
|
<a name="l01443"></a>01443 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b10</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlchar">data_read_o</span> <= { {<span class="vhdllogic">24</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] };
|
<a name="l01443"></a>01443 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b11</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlchar">data_read_o</span> <= { {<span class="vhdllogic">24</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">7</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">7</span>:<span class="vhdllogic">0</span>] };
|
<a name="l01444"></a>01444 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b01</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlchar">data_read_o</span> <= { {<span class="vhdllogic">24</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">23</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">23</span>:<span class="vhdllogic">16</span>] };
|
<a name="l01444"></a>01444 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b10</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlchar">data_read_o</span> <= { {<span class="vhdllogic">24</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">15</span>:<span class="vhdllogic">8</span>] };
|
<a name="l01445"></a>01445 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b00</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlchar">data_read_o</span> <= { {<span class="vhdllogic">24</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">24</span>] };
|
<a name="l01445"></a>01445 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b01</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlchar">data_read_o</span> <= { {<span class="vhdllogic">24</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">23</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">23</span>:<span class="vhdllogic">16</span>] };
|
<a name="l01446"></a>01446
|
<a name="l01446"></a>01446 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b00</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">0</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlchar">data_read_o</span> <= { {<span class="vhdllogic">24</span>{<a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>]}}, <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">24</span>] };
|
<a name="l01447"></a>01447 <span class="vhdlchar">finished_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01447"></a>01447
|
<a name="l01448"></a>01448 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l01448"></a>01448 <span class="vhdlchar">finished_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01449"></a>01449 <span class="vhdlkeyword">end</span>
|
<a name="l01449"></a>01449 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l01450"></a>01450 <span class="vhdlkeyword">end</span>
|
<a name="l01450"></a>01450 <span class="vhdlkeyword">end</span>
|
<a name="l01451"></a>01451 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01451"></a>01451 <span class="vhdlkeyword">end</span>
|
<a name="l01452"></a>01452 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01452"></a>01452 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01453"></a>01453 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01453"></a>01453 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01454"></a>01454
|
<a name="l01454"></a>01454 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01455"></a>01455 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
|
<a name="l01455"></a>01455
|
<a name="l01456"></a>01456 <span class="vhdlkeyword">end</span>
|
<a name="l01456"></a>01456 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
|
<a name="l01457"></a>01457 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01457"></a>01457 <span class="vhdlkeyword">end</span>
|
<a name="l01458"></a>01458 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01458"></a>01458 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01459"></a>01459 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01459"></a>01459 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01460"></a>01460
|
<a name="l01460"></a>01460 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01461"></a>01461 <span class="vhdlchar">fault_address_state_o</span> <= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2'b00</span> };
|
<a name="l01461"></a>01461
|
<a name="l01462"></a>01462 <span class="vhdlchar">rw_state_o</span> <= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
|
<a name="l01462"></a>01462 <span class="vhdlchar">fault_address_state_o</span> <= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2'b00</span> };
|
<a name="l01463"></a>01463 <span class="vhdlchar">fc_state_o</span> <= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
|
<a name="l01463"></a>01463 <span class="vhdlchar">rw_state_o</span> <= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
|
<a name="l01464"></a>01464 <span class="vhdlchar">interrupt_trap_o</span> <= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
|
<a name="l01464"></a>01464 <span class="vhdlchar">fc_state_o</span> <= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
|
<a name="l01465"></a>01465
|
<a name="l01465"></a>01465 <span class="vhdlchar">interrupt_trap_o</span> <= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
|
<a name="l01466"></a>01466 <span class="vhdlchar">jmp_bus_trap_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01466"></a>01466
|
<a name="l01467"></a>01467 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l01467"></a>01467 <span class="vhdlchar">jmp_bus_trap_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01468"></a>01468 <span class="vhdlkeyword">end</span>
|
<a name="l01468"></a>01468 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l01469"></a>01469 <span class="vhdlkeyword">end</span>
|
<a name="l01469"></a>01469 <span class="vhdlkeyword">end</span>
|
<a name="l01470"></a>01470 <a class="code" href="classbus__control.html#a269161b7fabba2e00d3a3a5153a9620e">S_READ_2</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l01470"></a>01470 <span class="vhdlkeyword">end</span>
|
<a name="l01471"></a>01471 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01471"></a>01471 <a class="code" href="classbus__control.html#a269161b7fabba2e00d3a3a5153a9620e">S_READ_2</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l01472"></a>01472 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01472"></a>01472 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01473"></a>01473 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01473"></a>01473 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01474"></a>01474
|
<a name="l01474"></a>01474 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01475"></a>01475 <span class="vhdlchar">data_read_o</span> <= { <span class="vhdlchar">data_read_o</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>] };
|
<a name="l01475"></a>01475
|
<a name="l01476"></a>01476
|
<a name="l01476"></a>01476 <span class="vhdlchar">data_read_o</span> <= { <span class="vhdlchar">data_read_o</span>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>], <a class="code" href="classbus__control.html#a89823a79ad55c73cf0b948fb1f284729">DAT_I</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">16</span>] };
|
<a name="l01477"></a>01477 <span class="vhdlchar">finished_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01477"></a>01477
|
<a name="l01478"></a>01478 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l01478"></a>01478 <span class="vhdlchar">finished_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01479"></a>01479
|
<a name="l01479"></a>01479 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l01480"></a>01480 <span class="vhdlkeyword">end</span>
|
<a name="l01480"></a>01480
|
<a name="l01481"></a>01481 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01481"></a>01481 <span class="vhdlkeyword">end</span>
|
<a name="l01482"></a>01482 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01482"></a>01482 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01483"></a>01483 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01483"></a>01483 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01484"></a>01484
|
<a name="l01484"></a>01484 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01485"></a>01485 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a8af7b5fb8c5d5d3788e5af5dad48393b">S_READ_3</a>;
|
<a name="l01485"></a>01485
|
<a name="l01486"></a>01486 <span class="vhdlkeyword">end</span>
|
<a name="l01486"></a>01486 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a8af7b5fb8c5d5d3788e5af5dad48393b">S_READ_3</a>;
|
<a name="l01487"></a>01487 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01487"></a>01487 <span class="vhdlkeyword">end</span>
|
<a name="l01488"></a>01488 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01488"></a>01488 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01489"></a>01489 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01489"></a>01489 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01490"></a>01490
|
<a name="l01490"></a>01490 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01491"></a>01491 <span class="vhdlchar">fault_address_state_o</span> <= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2'b00</span> };
|
<a name="l01491"></a>01491
|
<a name="l01492"></a>01492 <span class="vhdlchar">rw_state_o</span> <= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
|
<a name="l01492"></a>01492 <span class="vhdlchar">fault_address_state_o</span> <= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2'b00</span> };
|
<a name="l01493"></a>01493 <span class="vhdlchar">fc_state_o</span> <= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
|
<a name="l01493"></a>01493 <span class="vhdlchar">rw_state_o</span> <= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
|
<a name="l01494"></a>01494 <span class="vhdlchar">interrupt_trap_o</span> <= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
|
<a name="l01494"></a>01494 <span class="vhdlchar">fc_state_o</span> <= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
|
<a name="l01495"></a>01495
|
<a name="l01495"></a>01495 <span class="vhdlchar">interrupt_trap_o</span> <= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
|
<a name="l01496"></a>01496 <span class="vhdlchar">jmp_bus_trap_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01496"></a>01496
|
<a name="l01497"></a>01497 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l01497"></a>01497 <span class="vhdlchar">jmp_bus_trap_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01498"></a>01498 <span class="vhdlkeyword">end</span>
|
<a name="l01498"></a>01498 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l01499"></a>01499
|
<a name="l01499"></a>01499 <span class="vhdlkeyword">end</span>
|
<a name="l01500"></a>01500 <span class="vhdlkeyword">end</span>
|
<a name="l01500"></a>01500
|
<a name="l01501"></a>01501 <a class="code" href="classbus__control.html#a8af7b5fb8c5d5d3788e5af5dad48393b">S_READ_3</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l01501"></a>01501 <span class="vhdlkeyword">end</span>
|
<a name="l01502"></a>01502 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01502"></a>01502 <a class="code" href="classbus__control.html#a8af7b5fb8c5d5d3788e5af5dad48393b">S_READ_3</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l01503"></a>01503 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01503"></a>01503 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01504"></a>01504
|
<a name="l01504"></a>01504 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01505"></a>01505 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a269161b7fabba2e00d3a3a5153a9620e">S_READ_2</a>;
|
<a name="l01505"></a>01505
|
<a name="l01506"></a>01506 <span class="vhdlkeyword">end</span>
|
<a name="l01506"></a>01506 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a269161b7fabba2e00d3a3a5153a9620e">S_READ_2</a>;
|
<a name="l01507"></a>01507
|
<a name="l01507"></a>01507 <span class="vhdlkeyword">end</span>
|
<a name="l01508"></a>01508
|
<a name="l01508"></a>01508
|
<a name="l01509"></a>01509 <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l01509"></a>01509
|
<a name="l01510"></a>01510 <span class="vhdlchar">jmp_address_trap_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01510"></a>01510 <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l01511"></a>01511 <span class="vhdlchar">jmp_bus_trap_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01511"></a>01511 <span class="vhdlchar">jmp_address_trap_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01512"></a>01512
|
<a name="l01512"></a>01512 <span class="vhdlchar">jmp_bus_trap_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01513"></a>01513 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_read_i</span> == <span class="vhdllogic">1'b0</span> && <span class="vhdlchar">do_write_i</span> == <span class="vhdllogic">1'b0</span> && <span class="vhdlchar">do_interrupt_i</span> == <span class="vhdllogic">1'b0</span> && <span class="vhdlchar">do_reset_i</span> == <span class="vhdllogic">1'b0</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01513"></a>01513
|
<a name="l01514"></a>01514 <span class="vhdlchar">finished_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01514"></a>01514 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">do_read_i</span> == <span class="vhdllogic">1'b0</span> && <span class="vhdlchar">do_write_i</span> == <span class="vhdllogic">1'b0</span> && <span class="vhdlchar">do_interrupt_i</span> == <span class="vhdllogic">1'b0</span> && <span class="vhdlchar">do_reset_i</span> == <span class="vhdllogic">1'b0</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01515"></a>01515 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
|
<a name="l01515"></a>01515 <span class="vhdlchar">finished_o</span> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01516"></a>01516 <span class="vhdlkeyword">end</span>
|
<a name="l01516"></a>01516 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
|
<a name="l01517"></a>01517 <span class="vhdlkeyword">end</span>
|
<a name="l01517"></a>01517 <span class="vhdlkeyword">end</span>
|
<a name="l01518"></a>01518
|
<a name="l01518"></a>01518 <span class="vhdlkeyword">end</span>
|
<a name="l01519"></a>01519 <span class="keyword">//**********************</span>
|
<a name="l01519"></a>01519
|
<a name="l01520"></a>01520 <a class="code" href="classbus__control.html#aad6d7bc2df8264837b68548b4045a54b">S_WRITE_1</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l01520"></a>01520 <span class="keyword">//**********************</span>
|
<a name="l01521"></a>01521 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01521"></a>01521 <a class="code" href="classbus__control.html#aad6d7bc2df8264837b68548b4045a54b">S_WRITE_1</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l01522"></a>01522 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b10</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01522"></a>01522 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01523"></a>01523 <span class="keyword">//CYC_O <= 1'b1;</span>
|
<a name="l01523"></a>01523 <span class="vhdlkeyword">if</span>(<span class="vhdlchar">address_i</span>[<span class="vhdllogic">1</span>:<span class="vhdllogic">0</span>] == <span class="vhdllogic">2'b10</span> && <span class="vhdlchar">size_i</span>[<span class="vhdllogic">2</span>] == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01524"></a>01524 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> <= <a class="code" href="classbus__control.html#a2997069937ed71fba6eefb8837ba3282">address_i_plus_4</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
|
<a name="l01524"></a>01524 <span class="keyword">//CYC_O <= 1'b1;</span>
|
<a name="l01525"></a>01525 <span class="keyword">//STB_O <= 1'b1;</span>
|
<a name="l01525"></a>01525 <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a> <= <a class="code" href="classbus__control.html#a2997069937ed71fba6eefb8837ba3282">address_i_plus_4</a>[<span class="vhdllogic">31</span>:<span class="vhdllogic">2</span>];
|
<a name="l01526"></a>01526 <span class="keyword">//WE_O <= 1'b1;</span>
|
<a name="l01526"></a>01526 <span class="keyword">//STB_O <= 1'b1;</span>
|
<a name="l01527"></a>01527
|
<a name="l01527"></a>01527 <span class="keyword">//WE_O <= 1'b1;</span>
|
<a name="l01528"></a>01528 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> <= { <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16'b0</span> };
|
<a name="l01528"></a>01528
|
<a name="l01529"></a>01529 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> <= <span class="vhdllogic">4'b1100</span>;
|
<a name="l01529"></a>01529 <a class="code" href="classbus__control.html#aaf441f3256d7e10eee17eb5f1b70f1f4">DAT_O</a> <= { <span class="vhdlchar">data_write_i</span>[<span class="vhdllogic">15</span>:<span class="vhdllogic">0</span>], <span class="vhdllogic">16'b0</span> };
|
<a name="l01530"></a>01530
|
<a name="l01530"></a>01530 <a class="code" href="classbus__control.html#a2207a4305beaf41acb3471efdad89ee8">SEL_O</a> <= <span class="vhdllogic">4'b1100</span>;
|
<a name="l01531"></a>01531 <span class="keyword">//SGL_O <= 1'b0;</span>
|
<a name="l01531"></a>01531
|
<a name="l01532"></a>01532 <span class="keyword">//BLK_O <= 1'b1;</span>
|
<a name="l01532"></a>01532 <span class="keyword">//SGL_O <= 1'b0;</span>
|
<a name="l01533"></a>01533 <span class="keyword">//RMW_O <= 1'b0;</span>
|
<a name="l01533"></a>01533 <span class="keyword">//BLK_O <= 1'b1;</span>
|
<a name="l01534"></a>01534 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> <= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
|
<a name="l01534"></a>01534 <span class="keyword">//RMW_O <= 1'b0;</span>
|
<a name="l01535"></a>01535
|
<a name="l01535"></a>01535 <a class="code" href="classbus__control.html#a832208fcd8a362c800163c4016a876b1">CTI_O</a> <= <a class="code" href="classbus__control.html#a081002f0819a6acaf8e4dada896282ab">CTI_END_OF_BURST</a>;
|
<a name="l01536"></a>01536 <span class="keyword">//if(supervisor_i == 1'b1) fc_o <= FC_SUPERVISOR_DATA;</span>
|
<a name="l01536"></a>01536
|
<a name="l01537"></a>01537 <span class="keyword">//else fc_o <= FC_USER_DATA;</span>
|
<a name="l01537"></a>01537 <span class="keyword">//if(supervisor_i == 1'b1) fc_o <= FC_SUPERVISOR_DATA;</span>
|
<a name="l01538"></a>01538
|
<a name="l01538"></a>01538 <span class="keyword">//else fc_o <= FC_USER_DATA;</span>
|
<a name="l01539"></a>01539 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a1f273f6cbe8fa88c5ac793cdb16128c5">S_WRITE_2</a>;
|
<a name="l01539"></a>01539
|
<a name="l01540"></a>01540 <span class="vhdlkeyword">end</span>
|
<a name="l01540"></a>01540 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a1f273f6cbe8fa88c5ac793cdb16128c5">S_WRITE_2</a>;
|
<a name="l01541"></a>01541 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
<a name="l01541"></a>01541 <span class="vhdlkeyword">end</span>
|
<a name="l01542"></a>01542 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01542"></a>01542 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">begin</span>
|
<a name="l01543"></a>01543 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01543"></a>01543 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01544"></a>01544
|
<a name="l01544"></a>01544 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01545"></a>01545 <span class="vhdlchar">finished_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01545"></a>01545
|
<a name="l01546"></a>01546 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l01546"></a>01546 <span class="vhdlchar">finished_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01547"></a>01547 <span class="vhdlkeyword">end</span>
|
<a name="l01547"></a>01547 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l01548"></a>01548 <span class="vhdlkeyword">end</span>
|
<a name="l01548"></a>01548 <span class="vhdlkeyword">end</span>
|
<a name="l01549"></a>01549 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01549"></a>01549 <span class="vhdlkeyword">end</span>
|
<a name="l01550"></a>01550 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01550"></a>01550 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01551"></a>01551 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01551"></a>01551 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01552"></a>01552
|
<a name="l01552"></a>01552 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01553"></a>01553 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
|
<a name="l01553"></a>01553
|
<a name="l01554"></a>01554 <span class="vhdlkeyword">end</span>
|
<a name="l01554"></a>01554 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#aec447565d3715dba2b7ce53da597625a">S_INIT</a>;
|
<a name="l01555"></a>01555 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01555"></a>01555 <span class="vhdlkeyword">end</span>
|
<a name="l01556"></a>01556 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01556"></a>01556 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01557"></a>01557 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01557"></a>01557 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01558"></a>01558
|
<a name="l01558"></a>01558 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01559"></a>01559 <span class="vhdlchar">fault_address_state_o</span> <= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2'b00</span> };
|
<a name="l01559"></a>01559
|
<a name="l01560"></a>01560 <span class="vhdlchar">rw_state_o</span> <= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
|
<a name="l01560"></a>01560 <span class="vhdlchar">fault_address_state_o</span> <= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2'b00</span> };
|
<a name="l01561"></a>01561 <span class="vhdlchar">fc_state_o</span> <= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
|
<a name="l01561"></a>01561 <span class="vhdlchar">rw_state_o</span> <= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
|
<a name="l01562"></a>01562 <span class="vhdlchar">interrupt_trap_o</span> <= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
|
<a name="l01562"></a>01562 <span class="vhdlchar">fc_state_o</span> <= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
|
<a name="l01563"></a>01563
|
<a name="l01563"></a>01563 <span class="vhdlchar">interrupt_trap_o</span> <= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
|
<a name="l01564"></a>01564 <span class="vhdlchar">jmp_bus_trap_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01564"></a>01564
|
<a name="l01565"></a>01565 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l01565"></a>01565 <span class="vhdlchar">jmp_bus_trap_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01566"></a>01566 <span class="vhdlkeyword">end</span>
|
<a name="l01566"></a>01566 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l01567"></a>01567
|
<a name="l01567"></a>01567 <span class="vhdlkeyword">end</span>
|
<a name="l01568"></a>01568 <span class="vhdlkeyword">end</span>
|
<a name="l01568"></a>01568
|
<a name="l01569"></a>01569 <a class="code" href="classbus__control.html#a1f273f6cbe8fa88c5ac793cdb16128c5">S_WRITE_2</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l01569"></a>01569 <span class="vhdlkeyword">end</span>
|
<a name="l01570"></a>01570 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01570"></a>01570 <a class="code" href="classbus__control.html#a1f273f6cbe8fa88c5ac793cdb16128c5">S_WRITE_2</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l01571"></a>01571 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01571"></a>01571 <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ae3d44827a99e7e34d82d6d9c963d969a">ACK_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01572"></a>01572 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01572"></a>01572 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01573"></a>01573
|
<a name="l01573"></a>01573 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01574"></a>01574 <span class="vhdlchar">finished_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01574"></a>01574
|
<a name="l01575"></a>01575 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l01575"></a>01575 <span class="vhdlchar">finished_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01576"></a>01576
|
<a name="l01576"></a>01576 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l01577"></a>01577 <span class="vhdlkeyword">end</span>
|
<a name="l01577"></a>01577
|
<a name="l01578"></a>01578 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01578"></a>01578 <span class="vhdlkeyword">end</span>
|
<a name="l01579"></a>01579 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01579"></a>01579 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#ac04b92d002ff6e8ef2ebdf0f8927e7fe">RTY_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01580"></a>01580 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01580"></a>01580 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01581"></a>01581
|
<a name="l01581"></a>01581 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01582"></a>01582 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#aa913a2abc1c8f2afa2bb8f6ebcbbca01">S_WRITE_3</a>;
|
<a name="l01582"></a>01582
|
<a name="l01583"></a>01583 <span class="vhdlkeyword">end</span>
|
<a name="l01583"></a>01583 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#aa913a2abc1c8f2afa2bb8f6ebcbbca01">S_WRITE_3</a>;
|
<a name="l01584"></a>01584 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01584"></a>01584 <span class="vhdlkeyword">end</span>
|
<a name="l01585"></a>01585 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01585"></a>01585 <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classbus__control.html#aed18e255e00983e6fa7ff68e5ef0a330">ERR_I</a> == <span class="vhdllogic">1'b1</span>) <span class="vhdlkeyword">begin</span>
|
<a name="l01586"></a>01586 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01586"></a>01586 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01587"></a>01587
|
<a name="l01587"></a>01587 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b0</span>;
|
<a name="l01588"></a>01588 <span class="vhdlchar">fault_address_state_o</span> <= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2'b00</span> };
|
<a name="l01588"></a>01588
|
<a name="l01589"></a>01589 <span class="vhdlchar">rw_state_o</span> <= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
|
<a name="l01589"></a>01589 <span class="vhdlchar">fault_address_state_o</span> <= { <a class="code" href="classbus__control.html#ab52b5981311dc9ab34a62adce2ffc430">ADR_O</a>, <span class="vhdllogic">2'b00</span> };
|
<a name="l01590"></a>01590 <span class="vhdlchar">fc_state_o</span> <= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
|
<a name="l01590"></a>01590 <span class="vhdlchar">rw_state_o</span> <= ~<a class="code" href="classbus__control.html#ac79dbc3b2006a3d57dbd1612c87dc04d">WE_O</a>;
|
<a name="l01591"></a>01591 <span class="vhdlchar">interrupt_trap_o</span> <= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
|
<a name="l01591"></a>01591 <span class="vhdlchar">fc_state_o</span> <= <a class="code" href="classbus__control.html#a488e1e7c4869bb96a3cb4c0db79cf8c5">fc_o</a>;
|
<a name="l01592"></a>01592
|
<a name="l01592"></a>01592 <span class="vhdlchar">interrupt_trap_o</span> <= <a class="code" href="classbus__control.html#a63d428a3abed8bfe070ad6e6f82ca72e">VECTOR_BUS_TRAP</a>;
|
<a name="l01593"></a>01593 <span class="vhdlchar">jmp_bus_trap_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01593"></a>01593
|
<a name="l01594"></a>01594 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l01594"></a>01594 <span class="vhdlchar">jmp_bus_trap_o</span> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01595"></a>01595 <span class="vhdlkeyword">end</span>
|
<a name="l01595"></a>01595 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a53bab195602acdcbccabf53952bbd2c3">S_WAIT</a>;
|
<a name="l01596"></a>01596
|
<a name="l01596"></a>01596 <span class="vhdlkeyword">end</span>
|
<a name="l01597"></a>01597 <span class="vhdlkeyword">end</span>
|
<a name="l01597"></a>01597
|
<a name="l01598"></a>01598 <a class="code" href="classbus__control.html#aa913a2abc1c8f2afa2bb8f6ebcbbca01">S_WRITE_3</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l01598"></a>01598 <span class="vhdlkeyword">end</span>
|
<a name="l01599"></a>01599 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01599"></a>01599 <a class="code" href="classbus__control.html#aa913a2abc1c8f2afa2bb8f6ebcbbca01">S_WRITE_3</a>: <span class="vhdlkeyword">begin</span>
|
<a name="l01600"></a>01600 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01600"></a>01600 <a class="code" href="classbus__control.html#aa477164de6a4b0a52d27cefcaf870550">CYC_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01601"></a>01601
|
<a name="l01601"></a>01601 <a class="code" href="classbus__control.html#a67a1d21ce5fe5171d487d2bfb98d1fe7">STB_O</a> <= <span class="vhdllogic">1'b1</span>;
|
<a name="l01602"></a>01602 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a1f273f6cbe8fa88c5ac793cdb16128c5">S_WRITE_2</a>;
|
<a name="l01602"></a>01602
|
<a name="l01603"></a>01603 <span class="vhdlkeyword">end</span>
|
<a name="l01603"></a>01603 <a class="code" href="classbus__control.html#a2f9cb92f6d2028ff32830fbcf7e2d9ca">current_state</a> <= <a class="code" href="classbus__control.html#a1f273f6cbe8fa88c5ac793cdb16128c5">S_WRITE_2</a>;
|
<a name="l01604"></a>01604
|
<a name="l01604"></a>01604 <span class="vhdlkeyword">end</span>
|
<a name="l01605"></a>01605 <span class="vhdlkeyword">endcase</span>
|
<a name="l01605"></a>01605
|
<a name="l01606"></a>01606 <span class="vhdlkeyword">end</span>
|
<a name="l01606"></a>01606 <span class="vhdlkeyword">endcase</span>
|
<a name="l01607"></a>01607 <span class="vhdlkeyword">end</span>
|
<a name="l01607"></a>01607 <span class="vhdlkeyword">end</span>
|
|
<a name="l01608"></a>01608 <span class="vhdlkeyword">end</span>
|
</pre></div>
|
</pre></div>
|
</div>
|
</div>
|
</div>
|
</div>
|
<hr/><h2>Member Data Documentation</h2>
|
<hr/><h2>Member Data Documentation</h2>
|
<a class="anchor" id="a9d1ac811b477c31c0d6aec541dca418d"></a><!-- doxytag: member="bus_control::saved_pc_change" ref="a9d1ac811b477c31c0d6aec541dca418d" args="reg[1:0]" -->
|
<a class="anchor" id="a9d1ac811b477c31c0d6aec541dca418d"></a><!-- doxytag: member="bus_control::saved_pc_change" ref="a9d1ac811b477c31c0d6aec541dca418d" args="reg[1:0]" -->
|
Line 920... |
Line 920... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00843">843</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00844">844</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="aec447565d3715dba2b7ce53da597625a"></a><!-- doxytag: member="bus_control::S_INIT" ref="aec447565d3715dba2b7ce53da597625a" args="5'd0" -->
|
<a class="anchor" id="aec447565d3715dba2b7ce53da597625a"></a><!-- doxytag: member="bus_control::S_INIT" ref="aec447565d3715dba2b7ce53da597625a" args="5'd0" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 935... |
Line 935... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="a8e24d83b04e325557b534b6fbe3c06ca"></a><!-- doxytag: member="bus_control::S_RESET" ref="a8e24d83b04e325557b534b6fbe3c06ca" args="5'd1" -->
|
<a class="anchor" id="a8e24d83b04e325557b534b6fbe3c06ca"></a><!-- doxytag: member="bus_control::S_RESET" ref="a8e24d83b04e325557b534b6fbe3c06ca" args="5'd1" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 950... |
Line 950... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="a2545a07988315cbf68e808af80333335"></a><!-- doxytag: member="bus_control::S_BLOCKED" ref="a2545a07988315cbf68e808af80333335" args="5'd2" -->
|
<a class="anchor" id="a2545a07988315cbf68e808af80333335"></a><!-- doxytag: member="bus_control::S_BLOCKED" ref="a2545a07988315cbf68e808af80333335" args="5'd2" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 965... |
Line 965... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="a8ff92de377aefca42782778cda7132f3"></a><!-- doxytag: member="bus_control::S_INT_1" ref="a8ff92de377aefca42782778cda7132f3" args="5'd3" -->
|
<a class="anchor" id="a8ff92de377aefca42782778cda7132f3"></a><!-- doxytag: member="bus_control::S_INT_1" ref="a8ff92de377aefca42782778cda7132f3" args="5'd3" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 980... |
Line 980... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="af752b2515eb632068e26865f1569598c"></a><!-- doxytag: member="bus_control::S_READ_1" ref="af752b2515eb632068e26865f1569598c" args="5'd4" -->
|
<a class="anchor" id="af752b2515eb632068e26865f1569598c"></a><!-- doxytag: member="bus_control::S_READ_1" ref="af752b2515eb632068e26865f1569598c" args="5'd4" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 995... |
Line 995... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="a269161b7fabba2e00d3a3a5153a9620e"></a><!-- doxytag: member="bus_control::S_READ_2" ref="a269161b7fabba2e00d3a3a5153a9620e" args="5'd5" -->
|
<a class="anchor" id="a269161b7fabba2e00d3a3a5153a9620e"></a><!-- doxytag: member="bus_control::S_READ_2" ref="a269161b7fabba2e00d3a3a5153a9620e" args="5'd5" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1010... |
Line 1010... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="a8af7b5fb8c5d5d3788e5af5dad48393b"></a><!-- doxytag: member="bus_control::S_READ_3" ref="a8af7b5fb8c5d5d3788e5af5dad48393b" args="5'd6" -->
|
<a class="anchor" id="a8af7b5fb8c5d5d3788e5af5dad48393b"></a><!-- doxytag: member="bus_control::S_READ_3" ref="a8af7b5fb8c5d5d3788e5af5dad48393b" args="5'd6" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1025... |
Line 1025... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="a53bab195602acdcbccabf53952bbd2c3"></a><!-- doxytag: member="bus_control::S_WAIT" ref="a53bab195602acdcbccabf53952bbd2c3" args="5'd7" -->
|
<a class="anchor" id="a53bab195602acdcbccabf53952bbd2c3"></a><!-- doxytag: member="bus_control::S_WAIT" ref="a53bab195602acdcbccabf53952bbd2c3" args="5'd7" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1040... |
Line 1040... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="aad6d7bc2df8264837b68548b4045a54b"></a><!-- doxytag: member="bus_control::S_WRITE_1" ref="aad6d7bc2df8264837b68548b4045a54b" args="5'd8" -->
|
<a class="anchor" id="aad6d7bc2df8264837b68548b4045a54b"></a><!-- doxytag: member="bus_control::S_WRITE_1" ref="aad6d7bc2df8264837b68548b4045a54b" args="5'd8" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1055... |
Line 1055... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="a1f273f6cbe8fa88c5ac793cdb16128c5"></a><!-- doxytag: member="bus_control::S_WRITE_2" ref="a1f273f6cbe8fa88c5ac793cdb16128c5" args="5'd9" -->
|
<a class="anchor" id="a1f273f6cbe8fa88c5ac793cdb16128c5"></a><!-- doxytag: member="bus_control::S_WRITE_2" ref="a1f273f6cbe8fa88c5ac793cdb16128c5" args="5'd9" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1070... |
Line 1070... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="aa913a2abc1c8f2afa2bb8f6ebcbbca01"></a><!-- doxytag: member="bus_control::S_WRITE_3" ref="aa913a2abc1c8f2afa2bb8f6ebcbbca01" args="5'd10" -->
|
<a class="anchor" id="aa913a2abc1c8f2afa2bb8f6ebcbbca01"></a><!-- doxytag: member="bus_control::S_WRITE_3" ref="aa913a2abc1c8f2afa2bb8f6ebcbbca01" args="5'd10" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1085... |
Line 1085... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="abc89f2549e5275c60648fc9a94876e29"></a><!-- doxytag: member="bus_control::S_PC_0" ref="abc89f2549e5275c60648fc9a94876e29" args="5'd11" -->
|
<a class="anchor" id="abc89f2549e5275c60648fc9a94876e29"></a><!-- doxytag: member="bus_control::S_PC_0" ref="abc89f2549e5275c60648fc9a94876e29" args="5'd11" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1100... |
Line 1100... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="a729095d9bb813c82aee565216b092f38"></a><!-- doxytag: member="bus_control::S_PC_1" ref="a729095d9bb813c82aee565216b092f38" args="5'd12" -->
|
<a class="anchor" id="a729095d9bb813c82aee565216b092f38"></a><!-- doxytag: member="bus_control::S_PC_1" ref="a729095d9bb813c82aee565216b092f38" args="5'd12" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1115... |
Line 1115... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="aaa3088e2e223cdc5551d535c3739cad5"></a><!-- doxytag: member="bus_control::S_PC_2" ref="aaa3088e2e223cdc5551d535c3739cad5" args="5'd13" -->
|
<a class="anchor" id="aaa3088e2e223cdc5551d535c3739cad5"></a><!-- doxytag: member="bus_control::S_PC_2" ref="aaa3088e2e223cdc5551d535c3739cad5" args="5'd13" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1130... |
Line 1130... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="a28895ce8a15bd607103ea20914434342"></a><!-- doxytag: member="bus_control::S_PC_3" ref="a28895ce8a15bd607103ea20914434342" args="5'd14" -->
|
<a class="anchor" id="a28895ce8a15bd607103ea20914434342"></a><!-- doxytag: member="bus_control::S_PC_3" ref="a28895ce8a15bd607103ea20914434342" args="5'd14" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1145... |
Line 1145... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="a5e72ed7bc2e7991094fecd272775f92c"></a><!-- doxytag: member="bus_control::S_PC_4" ref="a5e72ed7bc2e7991094fecd272775f92c" args="5'd15" -->
|
<a class="anchor" id="a5e72ed7bc2e7991094fecd272775f92c"></a><!-- doxytag: member="bus_control::S_PC_4" ref="a5e72ed7bc2e7991094fecd272775f92c" args="5'd15" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1160... |
Line 1160... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="aa19b7d76f1e25fd78b158b98088bd82a"></a><!-- doxytag: member="bus_control::S_PC_5" ref="aa19b7d76f1e25fd78b158b98088bd82a" args="5'd16" -->
|
<a class="anchor" id="aa19b7d76f1e25fd78b158b98088bd82a"></a><!-- doxytag: member="bus_control::S_PC_5" ref="aa19b7d76f1e25fd78b158b98088bd82a" args="5'd16" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1175... |
Line 1175... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="a1c803cc4a4f514cd4027a798d9236e5e"></a><!-- doxytag: member="bus_control::S_PC_6" ref="a1c803cc4a4f514cd4027a798d9236e5e" args="5'd17" -->
|
<a class="anchor" id="a1c803cc4a4f514cd4027a798d9236e5e"></a><!-- doxytag: member="bus_control::S_PC_6" ref="a1c803cc4a4f514cd4027a798d9236e5e" args="5'd17" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1190... |
Line 1190... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00845">845</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00846">846</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="abd13c1b70988aa3f59e1d9cc23e62eb2"></a><!-- doxytag: member="bus_control::FC_USER_DATA" ref="abd13c1b70988aa3f59e1d9cc23e62eb2" args="3'd1" -->
|
<a class="anchor" id="abd13c1b70988aa3f59e1d9cc23e62eb2"></a><!-- doxytag: member="bus_control::FC_USER_DATA" ref="abd13c1b70988aa3f59e1d9cc23e62eb2" args="3'd1" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1205... |
Line 1205... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00865">865</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00866">866</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="a80b93f8634a7f03a199836a78c52d9bb"></a><!-- doxytag: member="bus_control::FC_USER_PROGRAM" ref="a80b93f8634a7f03a199836a78c52d9bb" args="3'd2" -->
|
<a class="anchor" id="a80b93f8634a7f03a199836a78c52d9bb"></a><!-- doxytag: member="bus_control::FC_USER_PROGRAM" ref="a80b93f8634a7f03a199836a78c52d9bb" args="3'd2" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1220... |
Line 1220... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00865">865</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00866">866</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="a6cb25547c77c5085562bd0ace17d08a4"></a><!-- doxytag: member="bus_control::FC_SUPERVISOR_DATA" ref="a6cb25547c77c5085562bd0ace17d08a4" args="3'd5" -->
|
<a class="anchor" id="a6cb25547c77c5085562bd0ace17d08a4"></a><!-- doxytag: member="bus_control::FC_SUPERVISOR_DATA" ref="a6cb25547c77c5085562bd0ace17d08a4" args="3'd5" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1235... |
Line 1235... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00865">865</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00866">866</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="a1dc6742718597d6e0ef98e8200bb49bf"></a><!-- doxytag: member="bus_control::FC_SUPERVISOR_PROGRAM" ref="a1dc6742718597d6e0ef98e8200bb49bf" args="3'd6" -->
|
<a class="anchor" id="a1dc6742718597d6e0ef98e8200bb49bf"></a><!-- doxytag: member="bus_control::FC_SUPERVISOR_PROGRAM" ref="a1dc6742718597d6e0ef98e8200bb49bf" args="3'd6" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1250... |
Line 1250... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00865">865</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00866">866</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="ac44cb27522dcf872ea1f1d63cb652d9b"></a><!-- doxytag: member="bus_control::FC_CPU_SPACE" ref="ac44cb27522dcf872ea1f1d63cb652d9b" args="3'd7" -->
|
<a class="anchor" id="ac44cb27522dcf872ea1f1d63cb652d9b"></a><!-- doxytag: member="bus_control::FC_CPU_SPACE" ref="ac44cb27522dcf872ea1f1d63cb652d9b" args="3'd7" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1265... |
Line 1265... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00865">865</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00866">866</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="ad836a90bd600a96241bed00462efaa7f"></a><!-- doxytag: member="bus_control::CTI_CLASSIC_CYCLE" ref="ad836a90bd600a96241bed00462efaa7f" args="3'd0" -->
|
<a class="anchor" id="ad836a90bd600a96241bed00462efaa7f"></a><!-- doxytag: member="bus_control::CTI_CLASSIC_CYCLE" ref="ad836a90bd600a96241bed00462efaa7f" args="3'd0" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1280... |
Line 1280... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00872">872</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00873">873</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="a4780c76f8764756e9ca6bc92a016fe8c"></a><!-- doxytag: member="bus_control::CTI_CONST_CYCLE" ref="a4780c76f8764756e9ca6bc92a016fe8c" args="3'd1" -->
|
<a class="anchor" id="a4780c76f8764756e9ca6bc92a016fe8c"></a><!-- doxytag: member="bus_control::CTI_CONST_CYCLE" ref="a4780c76f8764756e9ca6bc92a016fe8c" args="3'd1" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1295... |
Line 1295... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00872">872</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00873">873</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="a9c7e8a6d030ee1f404d7526ebda509ca"></a><!-- doxytag: member="bus_control::CTI_INCR_CYCLE" ref="a9c7e8a6d030ee1f404d7526ebda509ca" args="3'd2" -->
|
<a class="anchor" id="a9c7e8a6d030ee1f404d7526ebda509ca"></a><!-- doxytag: member="bus_control::CTI_INCR_CYCLE" ref="a9c7e8a6d030ee1f404d7526ebda509ca" args="3'd2" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1310... |
Line 1310... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00872">872</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00873">873</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="a081002f0819a6acaf8e4dada896282ab"></a><!-- doxytag: member="bus_control::CTI_END_OF_BURST" ref="a081002f0819a6acaf8e4dada896282ab" args="3'd7" -->
|
<a class="anchor" id="a081002f0819a6acaf8e4dada896282ab"></a><!-- doxytag: member="bus_control::CTI_END_OF_BURST" ref="a081002f0819a6acaf8e4dada896282ab" args="3'd7" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1325... |
Line 1325... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00872">872</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00873">873</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="a63d428a3abed8bfe070ad6e6f82ca72e"></a><!-- doxytag: member="bus_control::VECTOR_BUS_TRAP" ref="a63d428a3abed8bfe070ad6e6f82ca72e" args="8'd2" -->
|
<a class="anchor" id="a63d428a3abed8bfe070ad6e6f82ca72e"></a><!-- doxytag: member="bus_control::VECTOR_BUS_TRAP" ref="a63d428a3abed8bfe070ad6e6f82ca72e" args="8'd2" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1340... |
Line 1340... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00878">878</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00879">879</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="a16c432fa4a9897426aab6df04ee608e0"></a><!-- doxytag: member="bus_control::VECTOR_ADDRESS_TRAP" ref="a16c432fa4a9897426aab6df04ee608e0" args="8'd3" -->
|
<a class="anchor" id="a16c432fa4a9897426aab6df04ee608e0"></a><!-- doxytag: member="bus_control::VECTOR_ADDRESS_TRAP" ref="a16c432fa4a9897426aab6df04ee608e0" args="8'd3" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1355... |
Line 1355... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00878">878</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00879">879</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="a2f9cb92f6d2028ff32830fbcf7e2d9ca"></a><!-- doxytag: member="bus_control::current_state" ref="a2f9cb92f6d2028ff32830fbcf7e2d9ca" args="reg[4:0]" -->
|
<a class="anchor" id="a2f9cb92f6d2028ff32830fbcf7e2d9ca"></a><!-- doxytag: member="bus_control::current_state" ref="a2f9cb92f6d2028ff32830fbcf7e2d9ca" args="reg[4:0]" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1370... |
Line 1370... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00882">882</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00883">883</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="af4b71c6c152246795fcfed45e67bab33"></a><!-- doxytag: member="bus_control::reset_counter" ref="af4b71c6c152246795fcfed45e67bab33" args="reg[7:0]" -->
|
<a class="anchor" id="af4b71c6c152246795fcfed45e67bab33"></a><!-- doxytag: member="bus_control::reset_counter" ref="af4b71c6c152246795fcfed45e67bab33" args="reg[7:0]" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1385... |
Line 1385... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00883">883</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00884">884</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="a18d43f989323778008d066233ddaa191"></a><!-- doxytag: member="bus_control::last_interrupt_mask" ref="a18d43f989323778008d066233ddaa191" args="reg[2:0]" -->
|
<a class="anchor" id="a18d43f989323778008d066233ddaa191"></a><!-- doxytag: member="bus_control::last_interrupt_mask" ref="a18d43f989323778008d066233ddaa191" args="reg[2:0]" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1400... |
Line 1400... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00885">885</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00886">886</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="a4054e75175a8d9a78f2e34150e1c0465"></a><!-- doxytag: member="bus_control::CLK_I" ref="a4054e75175a8d9a78f2e34150e1c0465" args="" -->
|
<a class="anchor" id="a4054e75175a8d9a78f2e34150e1c0465"></a><!-- doxytag: member="bus_control::CLK_I" ref="a4054e75175a8d9a78f2e34150e1c0465" args="" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1415... |
Line 1415... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00760">760</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00761">761</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="a7c0d04a169a341f11af2b012abd481b3"></a><!-- doxytag: member="bus_control::reset_n" ref="a7c0d04a169a341f11af2b012abd481b3" args="" -->
|
<a class="anchor" id="a7c0d04a169a341f11af2b012abd481b3"></a><!-- doxytag: member="bus_control::reset_n" ref="a7c0d04a169a341f11af2b012abd481b3" args="" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1430... |
Line 1430... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00761">761</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00762">762</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="aa477164de6a4b0a52d27cefcaf870550"></a><!-- doxytag: member="bus_control::CYC_O" ref="aa477164de6a4b0a52d27cefcaf870550" args="" -->
|
<a class="anchor" id="aa477164de6a4b0a52d27cefcaf870550"></a><!-- doxytag: member="bus_control::CYC_O" ref="aa477164de6a4b0a52d27cefcaf870550" args="" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1445... |
Line 1445... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00763">763</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00764">764</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="ab52b5981311dc9ab34a62adce2ffc430"></a><!-- doxytag: member="bus_control::ADR_O" ref="ab52b5981311dc9ab34a62adce2ffc430" args="" -->
|
<a class="anchor" id="ab52b5981311dc9ab34a62adce2ffc430"></a><!-- doxytag: member="bus_control::ADR_O" ref="ab52b5981311dc9ab34a62adce2ffc430" args="" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1460... |
Line 1460... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00764">764</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00765">765</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="aaf441f3256d7e10eee17eb5f1b70f1f4"></a><!-- doxytag: member="bus_control::DAT_O" ref="aaf441f3256d7e10eee17eb5f1b70f1f4" args="" -->
|
<a class="anchor" id="aaf441f3256d7e10eee17eb5f1b70f1f4"></a><!-- doxytag: member="bus_control::DAT_O" ref="aaf441f3256d7e10eee17eb5f1b70f1f4" args="" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1475... |
Line 1475... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00765">765</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00766">766</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="a89823a79ad55c73cf0b948fb1f284729"></a><!-- doxytag: member="bus_control::DAT_I" ref="a89823a79ad55c73cf0b948fb1f284729" args="" -->
|
<a class="anchor" id="a89823a79ad55c73cf0b948fb1f284729"></a><!-- doxytag: member="bus_control::DAT_I" ref="a89823a79ad55c73cf0b948fb1f284729" args="" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1490... |
Line 1490... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00766">766</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00767">767</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="a2207a4305beaf41acb3471efdad89ee8"></a><!-- doxytag: member="bus_control::SEL_O" ref="a2207a4305beaf41acb3471efdad89ee8" args="" -->
|
<a class="anchor" id="a2207a4305beaf41acb3471efdad89ee8"></a><!-- doxytag: member="bus_control::SEL_O" ref="a2207a4305beaf41acb3471efdad89ee8" args="" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1505... |
Line 1505... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00767">767</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00768">768</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="a67a1d21ce5fe5171d487d2bfb98d1fe7"></a><!-- doxytag: member="bus_control::STB_O" ref="a67a1d21ce5fe5171d487d2bfb98d1fe7" args="" -->
|
<a class="anchor" id="a67a1d21ce5fe5171d487d2bfb98d1fe7"></a><!-- doxytag: member="bus_control::STB_O" ref="a67a1d21ce5fe5171d487d2bfb98d1fe7" args="" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1520... |
Line 1520... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00768">768</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00769">769</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="ac79dbc3b2006a3d57dbd1612c87dc04d"></a><!-- doxytag: member="bus_control::WE_O" ref="ac79dbc3b2006a3d57dbd1612c87dc04d" args="" -->
|
<a class="anchor" id="ac79dbc3b2006a3d57dbd1612c87dc04d"></a><!-- doxytag: member="bus_control::WE_O" ref="ac79dbc3b2006a3d57dbd1612c87dc04d" args="" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1535... |
Line 1535... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00769">769</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00770">770</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="ae3d44827a99e7e34d82d6d9c963d969a"></a><!-- doxytag: member="bus_control::ACK_I" ref="ae3d44827a99e7e34d82d6d9c963d969a" args="" -->
|
<a class="anchor" id="ae3d44827a99e7e34d82d6d9c963d969a"></a><!-- doxytag: member="bus_control::ACK_I" ref="ae3d44827a99e7e34d82d6d9c963d969a" args="" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1550... |
Line 1550... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00771">771</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00772">772</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="aed18e255e00983e6fa7ff68e5ef0a330"></a><!-- doxytag: member="bus_control::ERR_I" ref="aed18e255e00983e6fa7ff68e5ef0a330" args="" -->
|
<a class="anchor" id="aed18e255e00983e6fa7ff68e5ef0a330"></a><!-- doxytag: member="bus_control::ERR_I" ref="aed18e255e00983e6fa7ff68e5ef0a330" args="" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1565... |
Line 1565... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00772">772</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00773">773</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="ac04b92d002ff6e8ef2ebdf0f8927e7fe"></a><!-- doxytag: member="bus_control::RTY_I" ref="ac04b92d002ff6e8ef2ebdf0f8927e7fe" args="" -->
|
<a class="anchor" id="ac04b92d002ff6e8ef2ebdf0f8927e7fe"></a><!-- doxytag: member="bus_control::RTY_I" ref="ac04b92d002ff6e8ef2ebdf0f8927e7fe" args="" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1580... |
Line 1580... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00773">773</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00774">774</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="aae2a079b8db9e4631c16bcf5adac9291"></a><!-- doxytag: member="bus_control::SGL_O" ref="aae2a079b8db9e4631c16bcf5adac9291" args="" -->
|
<a class="anchor" id="aae2a079b8db9e4631c16bcf5adac9291"></a><!-- doxytag: member="bus_control::SGL_O" ref="aae2a079b8db9e4631c16bcf5adac9291" args="" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1595... |
Line 1595... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00776">776</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00777">777</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="a7b17f75c0d89e01e582ef03415312775"></a><!-- doxytag: member="bus_control::BLK_O" ref="a7b17f75c0d89e01e582ef03415312775" args="" -->
|
<a class="anchor" id="a7b17f75c0d89e01e582ef03415312775"></a><!-- doxytag: member="bus_control::BLK_O" ref="a7b17f75c0d89e01e582ef03415312775" args="" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1610... |
Line 1610... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00777">777</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00778">778</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="ab953355fe090ce478d166356b9cf085d"></a><!-- doxytag: member="bus_control::RMW_O" ref="ab953355fe090ce478d166356b9cf085d" args="" -->
|
<a class="anchor" id="ab953355fe090ce478d166356b9cf085d"></a><!-- doxytag: member="bus_control::RMW_O" ref="ab953355fe090ce478d166356b9cf085d" args="" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1625... |
Line 1625... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00778">778</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00779">779</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="a832208fcd8a362c800163c4016a876b1"></a><!-- doxytag: member="bus_control::CTI_O" ref="a832208fcd8a362c800163c4016a876b1" args="" -->
|
<a class="anchor" id="a832208fcd8a362c800163c4016a876b1"></a><!-- doxytag: member="bus_control::CTI_O" ref="a832208fcd8a362c800163c4016a876b1" args="" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1640... |
Line 1640... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00781">781</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00782">782</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="a1dd14b92bd4443311024f3a3fa6e0c8d"></a><!-- doxytag: member="bus_control::BTE_O" ref="a1dd14b92bd4443311024f3a3fa6e0c8d" args="" -->
|
<a class="anchor" id="a1dd14b92bd4443311024f3a3fa6e0c8d"></a><!-- doxytag: member="bus_control::BTE_O" ref="a1dd14b92bd4443311024f3a3fa6e0c8d" args="" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1655... |
Line 1655... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00782">782</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00783">783</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="a488e1e7c4869bb96a3cb4c0db79cf8c5"></a><!-- doxytag: member="bus_control::fc_o" ref="a488e1e7c4869bb96a3cb4c0db79cf8c5" args="" -->
|
<a class="anchor" id="a488e1e7c4869bb96a3cb4c0db79cf8c5"></a><!-- doxytag: member="bus_control::fc_o" ref="a488e1e7c4869bb96a3cb4c0db79cf8c5" args="" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1670... |
Line 1670... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00785">785</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00786">786</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="a93ed536c4b75b18958ffa28838ae5957"></a><!-- doxytag: member="bus_control::ipl_i" ref="a93ed536c4b75b18958ffa28838ae5957" args="" -->
|
<a class="anchor" id="a93ed536c4b75b18958ffa28838ae5957"></a><!-- doxytag: member="bus_control::ipl_i" ref="a93ed536c4b75b18958ffa28838ae5957" args="" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1685... |
Line 1685... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00788">788</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00789">789</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="a139d4b4c2d79d749375db4dd71f3a9fd"></a><!-- doxytag: member="bus_control::reset_o" ref="a139d4b4c2d79d749375db4dd71f3a9fd" args="" -->
|
<a class="anchor" id="a139d4b4c2d79d749375db4dd71f3a9fd"></a><!-- doxytag: member="bus_control::reset_o" ref="a139d4b4c2d79d749375db4dd71f3a9fd" args="" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1700... |
Line 1700... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00789">789</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00790">790</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="a96afbad4fe8073f7c58baf255b66c944"></a><!-- doxytag: member="bus_control::pc_i_plus_6" ref="a96afbad4fe8073f7c58baf255b66c944" args="wire[31:0]" -->
|
<a class="anchor" id="a96afbad4fe8073f7c58baf255b66c944"></a><!-- doxytag: member="bus_control::pc_i_plus_6" ref="a96afbad4fe8073f7c58baf255b66c944" args="wire[31:0]" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1715... |
Line 1715... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00835">835</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00836">836</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="addb6490ae2acff8c93b321b1e14c7bd4"></a><!-- doxytag: member="bus_control::pc_i_plus_4" ref="addb6490ae2acff8c93b321b1e14c7bd4" args="wire[31:0]" -->
|
<a class="anchor" id="addb6490ae2acff8c93b321b1e14c7bd4"></a><!-- doxytag: member="bus_control::pc_i_plus_4" ref="addb6490ae2acff8c93b321b1e14c7bd4" args="wire[31:0]" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1730... |
Line 1730... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00837">837</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00838">838</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<a class="anchor" id="a2997069937ed71fba6eefb8837ba3282"></a><!-- doxytag: member="bus_control::address_i_plus_4" ref="a2997069937ed71fba6eefb8837ba3282" args="wire[31:0]" -->
|
<a class="anchor" id="a2997069937ed71fba6eefb8837ba3282"></a><!-- doxytag: member="bus_control::address_i_plus_4" ref="a2997069937ed71fba6eefb8837ba3282" args="wire[31:0]" -->
|
<div class="memitem">
|
<div class="memitem">
|
Line 1745... |
Line 1745... |
</tr>
|
</tr>
|
</table>
|
</table>
|
</div>
|
</div>
|
<div class="memdoc">
|
<div class="memdoc">
|
|
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00840">840</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l00841">841</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
|
|
|
</div>
|
</div>
|
</div>
|
</div>
|
<hr/>The documentation for this class was generated from the following file:<ul>
|
<hr/>The documentation for this class was generated from the following file:<ul>
|
<li><a class="el" href="ao68000_8v_source.html">ao68000.v</a></li>
|
<li><a class="el" href="ao68000_8v_source.html">ao68000.v</a></li>
|
</ul>
|
</ul>
|
</div>
|
</div>
|
<hr class="footer"/><address class="footer"><small>Generated on Sat Jan 15 2011 22:20:15 for ao68000 by 
|
<hr class="footer"/><address class="footer"><small>Generated on Sun Jan 16 2011 11:00:04 for ao68000 by 
|
<a href="http://www.doxygen.org/index.html">
|
<a href="http://www.doxygen.org/index.html">
|
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
|
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
|
</body>
|
</body>
|
</html>
|
</html>
|
|
|
No newline at end of file
|
No newline at end of file
|