URL
https://opencores.org/ocsvn/apb_mstr/apb_mstr/trunk
[/] [apb_mstr/] [trunk/] [src/] [base/] [axi_master_stall.v] - Diff between revs 2 and 10
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
| Rev 2 |
Rev 10 |
| Line 163... |
Line 163... |
WSTALL <= #FFD 1'b0;
|
WSTALL <= #FFD 1'b0;
|
BSTALL <= #FFD 1'b0;
|
BSTALL <= #FFD 1'b0;
|
end
|
end
|
else if (stall_enable)
|
else if (stall_enable)
|
begin
|
begin
|
ARSTALL <= #FFD ARSTALL_pre & ARREADY;
|
ARSTALL <= #FFD ARSTALL_pre & ARREADY; //keep VALID signal stable while ~READY
|
RSTALL <= #FFD RSTALL_pre;
|
RSTALL <= #FFD RSTALL_pre;
|
AWSTALL <= #FFD AWSTALL_pre & AWREADY;
|
AWSTALL <= #FFD AWSTALL_pre & AWREADY; //keep VALID signal stable while ~READY
|
WSTALL <= #FFD WSTALL_pre & WREADY;
|
WSTALL <= #FFD WSTALL_pre & WREADY; //keep VALID signal stable while ~READY
|
BSTALL <= #FFD BSTALL_pre;
|
BSTALL <= #FFD BSTALL_pre;
|
end
|
end
|
else
|
else
|
begin
|
begin
|
ARSTALL <= #FFD 1'b0;
|
ARSTALL <= #FFD 1'b0;
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.
