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https://opencores.org/ocsvn/apbi2c/apbi2c/trunk
[/] [apbi2c/] [trunk/] [rtl/] [fifo.v] - Diff between revs 16 and 18
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Rev 18 |
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//// Author(s): - Felipe Fernandes Da Costa, fefe2560@gmail.com
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//// Author(s): - Felipe Fernandes Da Costa, fefe2560@gmail.com
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//// Ronal Dario Celaya
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//// Ronal Dario Celaya ,rcelaya.dario@gmail.com
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/////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////
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//// Copyright (C) 2009 Authors and OPENCORES.ORG
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//// Copyright (C) 2009 Authors and OPENCORES.ORG
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reg [AWIDTH-1:0] wr_ptr;
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reg [AWIDTH-1:0] wr_ptr;
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reg [AWIDTH-1:0] rd_ptr;
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reg [AWIDTH-1:0] rd_ptr;
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reg [AWIDTH:0] counter;
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reg [AWIDTH:0] counter;
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reg last_was_write;
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//Write pointer
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//Write pointer
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always@(posedge clock)
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always@(posedge clock)
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begin
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begin
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if (reset)
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if (reset)
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counter <= counter + 1'b1;
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counter <= counter + 1'b1;
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end
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end
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end
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end
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end
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end
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assign f_full = (counter == DEPTH -1) ; //(!last_was_write | last_position != {AWIDTH{1'b0}} )? 1'b1:1'b0;
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assign f_full = (counter == DEPTH- 1) ;
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assign f_empty = (counter == {AWIDTH{1'b0}}); //(last_was_write)? 1'b1:1'b0;
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assign f_empty = (counter == {AWIDTH{1'b0}});
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assign wr_en_ram = wr_en;
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assign wr_en_ram = wr_en;
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assign rd_en_ram = rd_en;
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assign rd_en_ram = rd_en;
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assign data_out = data_ram_out;
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assign data_out = data_ram_out;
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dp_ram #(DWIDTH, AWIDTH)
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dp_ram #(DWIDTH, AWIDTH)
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