OpenCores
URL https://opencores.org/ocsvn/apbi2c/apbi2c/trunk

Subversion Repositories apbi2c

[/] [apbi2c/] [trunk/] [rtl/] [i2c.v] - Diff between revs 18 and 20

Show entire file | Details | Blame | View Log

Rev 18 Rev 20
Line 89... Line 89...
        output PSLVERR,
        output PSLVERR,
        output INT_RX,
        output INT_RX,
        output INT_TX,
        output INT_TX,
        output [31:0] PRDATA,
        output [31:0] PRDATA,
        //I2C OUTPUT
        //I2C OUTPUT
 
        output SDA_ENABLE,
 
        output SCL_ENABLE,
        inout SDA,
        inout SDA,
        inout SCL
        inout SCL
 
 
          );
          );
 
 
Line 116... Line 118...
        wire [31:0] RX_DATA_OUT;
        wire [31:0] RX_DATA_OUT;
        wire RX_WRITE_ENA;
        wire RX_WRITE_ENA;
 
 
 
 
        wire [13:0] REGISTER_CONFIG;
        wire [13:0] REGISTER_CONFIG;
 
        wire [13:0] TIMEOUT_CONFIG;
 
 
 
 
        wire error;
        wire error;
 
 
 
 
        wire tx_empty;
        wire tx_empty;
        wire rx_empty;
        wire rx_empty;
 
 
        //wire w_pwrite;
        //wire w_pwrite;
        wire w_full;
        wire w_full;
Line 174... Line 179...
                        .PENABLE(PENABLE),
                        .PENABLE(PENABLE),
                        .PREADY(PREADY),
                        .PREADY(PREADY),
                        .PSLVERR(PSLVERR),
                        .PSLVERR(PSLVERR),
                        .READ_DATA_ON_RX(RX_DATA_OUT),
                        .READ_DATA_ON_RX(RX_DATA_OUT),
                        .INTERNAL_I2C_REGISTER_CONFIG(REGISTER_CONFIG),
                        .INTERNAL_I2C_REGISTER_CONFIG(REGISTER_CONFIG),
 
                        .INTERNAL_I2C_REGISTER_TIMEOUT(TIMEOUT_CONFIG),
                        .INT_RX(INT_RX),
                        .INT_RX(INT_RX),
                        .WR_ENA(TX_WRITE_ENA),
                        .WR_ENA(TX_WRITE_ENA),
                        .WRITE_DATA_ON_TX(TX_DATA_IN),
                        .WRITE_DATA_ON_TX(TX_DATA_IN),
                        .RD_ENA(RX_RD_EN),
                        .RD_ENA(RX_RD_EN),
                        .INT_TX(INT_TX),
                        .INT_TX(INT_TX),
Line 186... Line 192...
                        .ERROR(error)
                        .ERROR(error)
 
 
                     );
                     );
 
 
        //I2C CORE BLOCK WITH ALL ANOTHER BLOCKS
        //I2C CORE BLOCK WITH ALL ANOTHER BLOCKS
        module_i2c DUT_I2C_INTERNAL (
        module_i2c DUT_I2C_INTERNAL_RX_TX (
                                        .PCLK(PCLK),
                                        .PCLK(PCLK),
                                        .PRESETn(PRESETn),
                                        .PRESETn(PRESETn),
                                        .fifo_tx_rd_en(TX_RD_EN),
 
                                        .fifo_tx_f_full(TX_F_FULL),
 
                                        .fifo_tx_f_empty(TX_F_EMPTY),
 
                                        .fifo_tx_data_out(TX_DATA_OUT),
 
                                        .fifo_rx_wr_en(RX_WRITE_ENA),
                                        .fifo_rx_wr_en(RX_WRITE_ENA),
                                        .fifo_rx_f_empty(RX_F_EMPTY),
                                        .fifo_rx_f_empty(RX_F_EMPTY),
                                        .fifo_rx_data_in(RX_DATA_IN),
                                        .fifo_rx_data_in(RX_DATA_IN),
                                        .fifo_rx_f_full(RX_F_FULL),
                                        .fifo_rx_f_full(RX_F_FULL),
 
                                        .fifo_tx_f_full(TX_F_FULL),
 
                                        .fifo_tx_f_empty(TX_F_EMPTY),
 
                                        .fifo_tx_rd_en(TX_RD_EN),
 
                                        .fifo_tx_data_out(TX_DATA_OUT),
                                        .DATA_CONFIG_REG(REGISTER_CONFIG),
                                        .DATA_CONFIG_REG(REGISTER_CONFIG),
                                        .TX_EMPTY(tx_empty),
                                        .TIMEOUT_TX(TIMEOUT_CONFIG),
                                        .RX_EMPTY(rx_empty),
                                        .RX_EMPTY(rx_empty),
 
                                        .TX_EMPTY(tx_empty),
                                        .ERROR(error),
                                        .ERROR(error),
 
                                        .ENABLE_SDA(SDA_ENABLE),
 
                                        .ENABLE_SCL(SCL_ENABLE),
                                        .SDA(SDA),
                                        .SDA(SDA),
                                        .SCL(SCL)
                                        .SCL(SCL)
                                    );
                                    );
 
 
endmodule
endmodule
 
 
 No newline at end of file
 No newline at end of file

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.