Line 397... |
Line 397... |
|
|
|
|
if(counter == 0)
|
if(counter == 0)
|
{
|
{
|
|
|
v_ecb.value.integer = ADDR_AES_DOUTR;
|
|
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
|
|
|
|
v_ecb.value.integer = 1;
|
v_ecb.value.integer = 1;
|
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
|
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
|
|
|
counter_write++;
|
counter_read++;
|
counter++;
|
counter++;
|
|
|
|
|
|
|
}else if(counter == 1)
|
}else if(counter == 1)
|
{
|
{
|
v_ecb.value.integer = 0;
|
v_ecb.value.integer = 0;
|
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
|
vpi_put_value(PENABLE, &v_ecb, NULL, vpiNoDelay);
|
|
|
counter = 0;
|
|
|
if(counter_read < 4)
|
|
{
|
|
|
|
v_ecb.value.integer = ADDR_AES_DOUTR;
|
|
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
|
|
|
}
|
}
|
|
|
if(counter_write == 4)
|
|
|
if(counter_read == 4)
|
{
|
{
|
STATE = RESET_SR;
|
|
counter_write = 0;
|
v_ecb.value.integer = ADDR_AES_KEYR3;
|
|
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
|
|
|
|
}
|
|
|
|
|
|
if(counter_read == 5)
|
|
{
|
|
|
|
v_ecb.value.integer = ADDR_AES_KEYR2;
|
|
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
|
|
|
|
}
|
|
|
|
|
|
|
|
if(counter_read == 6)
|
|
{
|
|
|
|
v_ecb.value.integer = ADDR_AES_KEYR1;
|
|
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
|
|
|
|
}
|
|
|
|
|
|
if(counter_read == 7)
|
|
{
|
|
|
|
v_ecb.value.integer = ADDR_AES_KEYR0;
|
|
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
|
|
|
|
}
|
|
|
|
|
|
if(counter_read == 8)
|
|
{
|
|
|
|
v_ecb.value.integer = ADDR_AES_IVR3;
|
|
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
|
|
|
|
}
|
|
|
|
|
|
if(counter_read == 9)
|
|
{
|
|
|
|
v_ecb.value.integer = ADDR_AES_IVR2;
|
|
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
|
|
|
|
}
|
|
|
|
|
|
|
|
if(counter_read == 10)
|
|
{
|
|
|
|
v_ecb.value.integer = ADDR_AES_IVR1;
|
|
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
|
|
|
|
}
|
|
|
|
|
|
if(counter_read == 11)
|
|
{
|
|
|
|
v_ecb.value.integer = ADDR_AES_IVR0;
|
|
vpi_put_value(PADDR, &v_ecb, NULL, vpiNoDelay);
|
|
|
|
}
|
|
|
|
|
|
counter = 0;
|
|
}
|
|
|
|
if(counter_read == 12)
|
|
{
|
|
STATE = RESET_SR;
|
|
counter_read = 0;
|
}
|
}
|
|
|
break;
|
break;
|
|
|
case RESET_SR:
|
case RESET_SR:
|