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[/] [apbtoaes128/] [trunk/] [rtl/] [aes_ip.v] - Diff between revs 3 and 7

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Rev 3 Rev 7
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////
////
////    AES CORE BLOCK
////    AES CORE BLOCK
////
////
////
////
////
////
//// This file is part of the APB to AES128 project
//// This file is part of the APB to I2C project
////
////
//// http://www.opencores.org/cores/apbtoaes128/
//// http://www.opencores.org/cores/apbi2c/
////
////
////
////
////
////
//// Description
//// Description
////
////
Line 108... Line 108...
wire start;
wire start;
wire disable_core;
wire disable_core;
wire write_en;
wire write_en;
wire read_en;
wire read_en;
wire first_block;
wire first_block;
 
//wire pwdata_host_interface;
 
 
assign PREADY = 1'b1;
assign PREADY = 1'b1;
assign PSLVERR = 1'b0;
assign PSLVERR = 1'b0;
 
//assign pwdata_host_interface = PWDATA[12:0];
 
 
host_interface HOST_INTERFACE
host_interface HOST_INTERFACE
(
(
        .key_en       ( key_en       ),
        .key_en       ( key_en       ),
        .col_addr     ( addr         ),
        .col_addr     ( addr         ),
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        .dma_req_wr   ( dma_req_wr   ),
        .dma_req_wr   ( dma_req_wr   ),
        .dma_req_rd   ( dma_req_rd   ),
        .dma_req_rd   ( dma_req_rd   ),
        .start_core   ( start        ),
        .start_core   ( start        ),
        .PRDATA       ( PRDATA       ),
        .PRDATA       ( PRDATA       ),
        .PADDR        ( PADDR        ),
        .PADDR        ( PADDR        ),
        .PWDATA       ( PWDATA       ),
        .PWDATA       ( PWDATA[12:0] ),
        .PWRITE       ( PWRITE       ),
        .PWRITE       ( PWRITE       ),
        .PENABLE      ( PENABLE      ),
        .PENABLE      ( PENABLE      ),
        .PSEL         ( PSEL         ),
        .PSEL         ( PSEL         ),
        .PCLK         ( PCLK         ),
        .PCLK         ( PCLK         ),
        .PRESETn      ( PRESETn      ),
        .PRESETn      ( PRESETn      ),

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