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[/] [apbtoaes128/] [trunk/] [rtl/] [data_swap.v] - Diff between revs 3 and 7

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////
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////    AES CORE BLOCK
////    AES CORE BLOCK
////
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////
////
////
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//// This file is part of the APB to AES128 project
//// This file is part of the APB to I2C project
////
////
//// http://www.opencores.org/cores/apbtoaes128/
//// http://www.opencores.org/cores/apbi2c/
////
////
////
////
////
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//// Description
//// Description
////
////
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wire [WIDTH - 1 : 0] words[0 : TYPES - 1];
wire [WIDTH - 1 : 0] words[0 : TYPES - 1];
 
 
generate
generate
        genvar i, j;
        genvar i, j;
        for(i = 0; i < TYPES; i = i + 1)
        for(i = 0; i < TYPES; i = i + 1)
 
        begin:BLOCK
                for(j = 0; j < WIDTH; j = j + 1)
                for(j = 0; j < WIDTH; j = j + 1)
                        begin
                        begin: SUB_BLOCK
                                if(i != 3)
                                if(i != 3)
                                        assign words[i][j] = data_in[(WIDTH - (WIDTH/2**i)) - 2*(WIDTH/2**i)*(j/(WIDTH/2**i)) + j];
                                        assign words[i][j] = data_in[(WIDTH - (WIDTH/2**i)) - 2*(WIDTH/2**i)*(j/(WIDTH/2**i)) + j];
                                else
                                else
                                        assign words[i][j] = data_in[WIDTH - 1 - j];
                                        assign words[i][j] = data_in[WIDTH - 1 - j];
                        end
                        end
 
        end
endgenerate
endgenerate
 
 
assign data_swap = words[swap_type];
assign data_swap = words[swap_type];
 
 
endmodule
endmodule

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