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[/] [apbtoaes128/] [trunk/] [rtl/] [host_interface.v] - Diff between revs 11 and 12

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Rev 11 Rev 12
Line 400... Line 400...
        end
        end
 
 
assign col_addr = cnt;
assign col_addr = cnt;
assign col_wr_en = (PADDR == AES_DINR  && write_en && state == INPUT);
assign col_wr_en = (PADDR == AES_DINR  && write_en && state == INPUT);
assign col_rd_en = (PADDR == AES_DOUTR && read_en  && state == OUTPUT);
assign col_rd_en = (PADDR == AES_DOUTR && read_en  && state == OUTPUT);
assign wr_err_en = (PENABLE && PADDR == AES_DINR  && write_en && (state != INPUT  && state != IDLE));
assign wr_err_en = (PADDR == AES_DINR  && write_en && (state != INPUT  && state != IDLE));
assign rd_err_en = (PENABLE && PADDR == AES_DOUTR && read_en  && (state != OUTPUT && state != IDLE));
assign rd_err_en = (PADDR == AES_DOUTR && read_en  && (state != OUTPUT && state != IDLE));
 
 
// DMA Requests Logic
// DMA Requests Logic
always @(posedge PCLK, negedge PRESETn)
always @(posedge PCLK, negedge PRESETn)
        begin
        begin
                if(!PRESETn)
                if(!PRESETn)

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